參數(shù)資料
型號(hào)： CD4017BMS,
廠商： Intersil Corporation
元件分類： 通用總線功能
英文描述： CMOS Counter/Dividers(CMOS計(jì)數(shù)器/驅(qū)動(dòng)器)
中文描述： 的CMOS計(jì)數(shù)器/分頻器（的CMOS計(jì)數(shù)器/驅(qū)動(dòng)器）
文件頁數(shù)： 4/10頁
文件大?。?/td> 157K
代理商： CD4017BMS,
4
Propagation Delay Clock
to Decode Out
TPHL1
TPLH1
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 5V
VDD = 10V
VDD = 15V
Any Input
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
-
-
-
-
-
-
-
-
270
170
250
160
230
170
100
80
-
-
230
100
70
260
110
60
200
90
60
7.5
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
Propagation Delay Clock
to Carry Out
TPHL2
TPLH2
Propagation Delay Reset
to out
TPHL3
TPLH3
Transition Time
TTHL
TTLH
Maximum Clock Input Fre-
quency
FCL
5.0
5.5
-
-
-
-
-
-
-
-
-
-
Minimum Setup Time
Clock Inhibit to Clock
Setup
TS
Minimum Reset Pulse
Width
TW
Minimum Clock Pulse
Width
TW
Input Capacitance
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial
design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
CIN
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
LIMITS
UNITS
MIN
MAX
Supply Current
IDD
VDD = 20V, VIN = VDD or GND
1, 4
-
25
μ
A
N Threshold Voltage
VTN
VDD = 10V, ISS = -10
μ
A
VDD = 10V, ISS = -10
μ
A
1, 4
-2.8
-0.7
V
N Threshold Voltage
Delta
VTN
1, 4
-
±
1
V
P Threshold Voltage
VTP
VSS = 0V, IDD = 10
μ
A
VSS = 0V, IDD = 10
μ
A
1, 4
+25
o
C
+25
o
C
0.2
2.8
V
P Threshold Voltage
Delta
VTP
1, 4
-
±
1
V
Functional
F
VDD = 18V, VIN = VDD or GND
1
+25
o
C
VOH >
VDD/2
VOL <
VDD/2
V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
1, 2, 3, 4
+25
o
C
-
1.35 x
+25
o
C
Limit
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25
o
C limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25
O
C
PARAMETER
SYMBOL
DELTA LIMIT
Supply Current - MSI-2
IDD
±
1.0
μ
A
±
20% x Pre-Test Reading
±
20% x Pre-Test Reading
Output Current (Sink)
IOL5
Output Current (Source)
IOH5A
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
MIN
UNITS
MAX
CD4017BMS, CD4022BMS
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