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參數(shù)資料
| 型號(hào)： | CD4016 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Quad Bilateral Switch |
| 中文描述： | 四雙邊開關(guān) |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 155K |
| 代理商： | CD4016 |
AC Electrical Characteristics
*
(Continued)
T
A
e
25
§
C, t
r
e
t
f
e
20 ns and V
SS
e
0V unless otherwise specified
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Frequency Response D Switch
‘‘ON’’ (Frequency at
b
3 dB)
V
C
e
V
DD
e
5V, V
SS
eb
5V,
R
L
e
1 k
X
, V
IS
e
5 V
P-P
,
20 Log
10
V
OS
/V
OS
(1 kHz)
b
dB,
(Figure 4)
V
DD
e
5V, V
C
e
V
SS
eb
5V,
R
L
e
1 k
X
, V
IS
e
5 V
P-P
,
20 Log
10
(V
OS
/V
IS
)
eb
50 dB,
(Figure 4)
V
DD
e
V
C(A)
e
5V; V
SS
e
V
C(B)
eb
5V,
R
L
e
1 k
X
V
IS(A)
e
5 V
P-P
,
20 Log
10
(V
OS(B)
/V
OS(A)
)
eb
50 dB,
(Figure 5)
V
DD
e
10V, R
L
e
10 k
X
R
IN
e
1 k
X
, V
CC
e
10V Square Wave,
C
L
e
50 pF (Figure 6)
R
L
e
1 k
X
, C
L
e
50 pF, (Figure 7)
V
OS(f)
e
(/2
V
OS
(1 kHz)
V
DD
e
5V
V
DD
e
10V
V
DD
e
15V
40
MHz
Feedthrough D Switch ‘‘OFF’’
(Frequency at
b
50 dB)
1.25
MHz
Crosstalk Between Any Two
Switches (Frequency at
b
50 dB)
0.9
MHz
Crosstalk; Control Input to
Signal Output
150
mV
P-P
Maximum Control Input
6.5
8.0
9.0
MHz
MHz
MHz
C
IS
Signal Input Capacitance
4
pF
C
OS
Signal Output Capacitance
V
DD
e
10V
V
C
e
0V
4
pF
C
IOS
Feedthrough Capacitance
0.2
pF
C
IN
*
AC Paramters are guaranteed by DC correlated testing.
Control Input Capacitance
5
7.5
pF
Note 1:
‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices
should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device
operation.
Note 2:
V
SS
e
0V unless otherwise specified.
Note 3:
These devices should not be connected to circuits with the power ‘‘ON’’.
Note 4:
In all cases, there is approximately 5 pF of probe and jig capacitance on the output; however, this capacitance is included in C
L
wherever it is specified.
Note 5:
V
IS
is the voltage at the in/out pin and V
OS
is the voltage at the out/in pin. V
C
is the voltage at the control input.
Note 6:
If the switch input is held at V
DD
, V
IHC
is the control input level that will cause the switch output to meet the standard ‘‘B’’ series V
OH
and I
OH
output levels.
If the analog switch input is connected to V
SS
, V
IHC
is the control input level D which allows the switch tosink standard ‘‘B’’ series
l
I
OH
l
, high level current, and still
maintain a V
OL
s
‘‘B’’ series. These currents are shown in Figure 8.
AC Test Circuits and Switching Time Waveforms
Figure 1. t
PLH
, t
PLH
Propagation Delay Time Signal Input to Signal Output
TL/F/5661–2
FIGURE 2. t
PZH
, t
PHZ
Propagation Delay Time Control to Signal Output
4
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