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參數(shù)資料
| 型號： | CD4015 |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS Dual 4-Stage Static Shift Register With Serial Input/Parallel Output |
| 中文描述： | CMOS雙4級靜態(tài)移位寄存器在串行輸入/并行輸出 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 130K |
| 代理商： | CD4015 |
7-92
Specifications CD4015BMS
Input Voltage High
VIH
VDD = 10V, VOH > 9V, VOL < 1V
1, 2
+25
o
C, +125
o
C,
-55
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+25
o
C
+7
-
V
Propagation Delay
Clock To Q
TPHL1
TPLH1
VDD = 10V
1, 2, 3
-
160
ns
VDD = 15V
1, 2, 3
-
120
ns
Propagation Delay
Reset To Q
TPHL2
VDD = 10V
1, 2, 3
-
200
ns
VDD = 15V
1, 2, 3
-
160
ns
Transition Time
TTHL
TTLH
VDD = 10V
1, 2, 3
-
100
ns
VDD = 15V
1, 2, 3
-
80
ns
Maximum Clock Input
Frequency
FCL
VDD = 10V
1, 2, 3
6
-
MHz
VDD = 15V
1, 2, 3
8.5
-
MHz
Minimum Data Setup
Time
TS
VDD = 5V
1, 2, 3
-
70
ns
VDD = 10V
1, 2, 3
-
40
ns
VDD = 15V
1, 2, 3
-
30
ns
Clock Rise and Fall Time
TRCL
TFCL
VDD = 5V
1, 2, 3
-
15
μ
s
VDD = 10V
1, 2, 3
-
15
μ
s
VDD = 15V
1, 2, 3
-
15
μ
s
Minimum Clock Pulse
Width
TWCL
VDD = 5V
1, 2, 3
-
180
ns
VDD = 10V
1, 2, 3
-
80
ns
VDD = 15V
1, 2, 3
-
50
ns
Minimum Reset Pulse
Width
TWR
VDD = 5V
2, 3
-
200
ns
VDD = 10V
2, 3
-
80
ns
VDD = 15V
2, 3
-
60
ns
Input Capacitance
CIN
Any Input
1, 2
-
7.5
pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
+25
o
C
+25
o
C
+25
o
C
LIMITS
UNITS
MIN
MAX
Supply Current
IDD
VDD = 20V, VIN = VDD or GND
1, 4
-
25
μ
A
N Threshold Voltage
VNTH
VDD = 10V, ISS = -10
μ
A
1, 4
-2.8
-0.2
V
N Threshold Voltage
Delta
VNTH
VDD = 10V, ISS= -10
μ
A
1, 4
-
±
1
V
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10
μ
A
1, 4
+25
o
C
+25
o
C
0.2
2.8
V
P Threshold Voltage
Delta
VPTH
VSS = 0V, IDD = 10
μ
A
1, 4
-
±
1
V
Functional
F
VDD = 18V, VIN = VDD or GND
1
+25
o
C
VOH >
VDD/2
VOL <
VDD/2
V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time
TPHL
TPLH
VDD = 5V
1, 2, 3, 4
+25
o
C
-
1.35 x
+25
o
C
Limit
ns
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25
o
C limit.
4. Read and Record
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
(Continued)
PARAMETER
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
LIMITS
UNITS
MIN
MAX
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相關代理商/技術參數(shù) |
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| CD40158CN | 制造商:Fairchild Semiconductor Corporation 功能描述: |
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| CD4015B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:CMOS DUAL 4-STAGE STATIC SHIFT REGISTER |
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