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參數(shù)資料
| 型號： | CD4008BMS |
| 廠商： | Intersil Corporation |
| 英文描述： | CMOS 4-Bit Full Adder With Parallel Carry Out(CMOS 4位 并行輸出加法器) |
| 中文描述： | 的CMOS 4位全加器與平行開展（的CMOS 4位并行輸出加法器） |
| 文件頁數(shù)： | 8/8頁 |
| 文件大?。?/td> | 67K |
| 代理商： | CD4008BMS |
7-682
CD4008BMS
Typical Performance Characteristics
(Continued)
Chip Dimensions and Pad Layouts
FIGURE 8. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 9. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 10. TYPICAL DISSIPATION CHARACTERISTICS
10V
5V
AMBIENT TEMPERATURE (T
A
) = +25
o
C
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
0
5
10
15
15
10
5
20
25
30
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
O
10V
5V
AMBIENT TEMPERATURE (T
A
) = +25
o
C
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
0
5
10
15
7.5
5.0
2.5
10.0
12.5
15.0
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
O
P
μ
W
INPUT FREQUENCY (f
φ
) (kHz)
1
10
10
2
10
3
10
4
10
6
10
5
10
4
10
3
10
2
10
AMBIENT TEMPERATURE (T
A
) = +25
o
C
SUPPLY VOLTAGE (VDD) = 15V
5V
10V
5V
3.5V
LOAD CAPACITANCE (CL) = 15pF
(CL) = 50pF
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10
-3
inch)
METALLIZATION:
Thickness: 11k
14k
, AL.
10.4k - 15.6k
, Silane
PASSIVATION:
BOND PADS:
0.004 inches X 0.004 inches MIN
DIE THICKNESS:
0.0198 inches - 0.0218 inches
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