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參數(shù)資料
| 型號： | CBT6832EDGG |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged outputs and Schottky undershoot protection for live insertion |
| 中文描述： | CBT/FST/QS/5C/B SERIES, 16 1 LINE TO 2 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO56 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-364-1, TSSOP2-56 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 67K |
| 代理商： | CBT6832EDGG |
Philips Semiconductors
Product specification
CBT6832E
16-bit controlled enable rate 1-of-2 multiplexer/demultiplexer with precharged
outputs and Schottky undershoot protection for live insertion
2000 Sep 01
4
DC ELECTRICAL CHARACTERISTICS
Over operating temperature range T
amb
= 0
°
C to +70
°
C; V
CC
= 5 V
±
10%; V
BIAS
= 1.3 V to V
CC
, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
TYP
1
UNIT
MIN
MAX
V
IH
V
IL
I
IH
I
IL
Input HIGH voltage
Guaranteed logic HIGH level
2.0
V
Input LOW voltage
Guaranteed logic LOW level
–0.5
0.8
±
5
±
5
V
μ
A
μ
A
Input HIGH current
V
CC
= 5.5 V, V
IN
= V
CC
V
CC
= 5.5 V, V
IN
= GND
A = 0 V or V
CC
MAX,
V
BIAS1
= V
BIAS2
= V
CC
MAX
B = 0 V or V
CC
MAX,
V
BIAS1
= V
BIAS2
= V
CC
MAX
V
CC
= 4.5 V; I
I
= –18 mA
V
CC
= 4.5 V; V
I
= 0 V; I
I
= 48 mA
V
CC
= 4.5 V; V
I
= 2.4 V; I
I
= –15 mA
Input LOW current
I
OZH
High impedance output current
±
1
μ
A
I
OZL
Low impedance output current
–0.2
–2
mA
V
IK
Input clamp voltage
–0.7
–1.8
V
r
on
Switch on resistance
2
5
8
10
15
Capacitance
3
(T
amb
= +25
°
C; f = 1 MHz)
C
IN
Input capacitance
C
OFF B
B capacitance, switch off
C
OFF A
A capacitance, switch off
C
ON 1
Capacitance, switch on (one B)
C
ON 2
Capacitance, both B channels enabled
Power supply
V
I
= 0 V
V
I
= 0 V
V
I
= 0 V
V
I
= 0 V
V
I
= 0 V
4.5
pF
8
pF
13
pF
21
pF
34
pF
I
CC
Quiescent supply current enabled
V
CC
= 5.5 V; V
I
= V
CC
or GND
V
= 5.5 V, one input at 3.4 V,
other inputs at V
CC
or GND
100
μ
A
I
CC
Additional supply current per input pin
5
2.5
mA
NOTES:
1. All typical values are at V
= 5 V, T
= +25
°
C ambient and maximum loading.
2. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch.
On-state resistance is determined by the lowest voltage of the two (A or B) terminals.
3. These parameters are determined by device characterization, but is not production tested.
4. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
5. Per TTL driven input (V
I
= 3.4 V, control inputs only); A and B pins do not contribute to I
CC
.
6. This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency.
The A and B inputs generate no significant AC or DC currents as they transition. this parameter is not tested, but is guaranteed by design.
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