參數(shù)資料
型號: CA3240E
廠商: HARRIS SEMICONDUCTOR
元件分類: 運(yùn)動控制電子
英文描述: Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output
中文描述: DUAL OP-AMP, 15000 uV OFFSET-MAX, 4.5 MHz BAND WIDTH, PDIP8
文件頁數(shù): 14/15頁
文件大?。?/td> 609K
代理商: CA3240E
14
FIGURE 25A.
FIGURE 25B.
FIGURE 25. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE
FIGURE 26A. SETTLING TIME vs INPUT VOLTAGE
FIGURE 26B. TEST CIRCUIT (FOLLOWER)
FIGURE 26C. TEST CIRCUIT (INVERTING)
FIGURE 26. INPUT VOLTAGE vs SETTLING TIME
Typical Performance Curves
(Continued)
T
A
= -40
o
C
T
A
= 25
o
C
T
A
= -40
o
C
T
A
= 25
o
C
T
A
= 85
o
C
T
A
= 85
o
C
R
L
=
0
-0.5
-1
-1.5
-2
-2.5
-3
0
5
10
15
20
25
SUPPLY VOLTAGE (V)
I
R
OUTPUT VOLTAGE (+V
O
)
COMMON MODE VOLTAGE (+V
ICR
)
T
A
= -40
o
C TO 85
o
C
T
A
= 85
o
C
T
A
= -40
o
C
T
A
= 25
o
C
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
I
R
0
5
10
15
20
25
SUPPLY VOLTAGE (V)
R
L
=
OUTPUT VOLTAGE (-V
O
)
COMMON MODE VOLTAGE (-V
ICR
)
0.1
I
1.0
10
2
4
6
8
SUPPLY VOLTAGE: V
S
=
±
15V
T
A
= 25
o
C, R
L
= 2k
, C
L
= 100pF
1mV
10mV
2
4
6
8
10mV
1mV
1mV
1mV
10mV
10mV
FOLLOWER
INVERTING
10
8
6
4
2
0
-2
-4
-6
-8
-10
TIME (
μ
s)
2k
10k
CA3240
-
+15V
-15V
0.1
μ
F
0.1
μ
F
100pF
SIMULATED
LOAD
2k
0.05
μ
F
+
5k
2k
5.11k
4.99k
5k
200
CA3240
+
+15V
-15V
0.1
μ
F
0.1
μ
F
100pF
SIMULATED
LOAD
D
1N914
D
1
1N914
SETTLING POINT
-
CA3240, CA3240A
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