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參數(shù)資料
| 型號： | CA3102MZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OP AMP DUAL HI FREQ 14-SOIC |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 增益帶寬積： | 1.35GHz |
| 電流 - 輸入偏壓： | 13.5µA |
| 電壓 - 輸入偏移： | 250µV |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 14-SOIC |
| 包裝： | 管件 |
1
CA3102
Dual High Frequency Differential Amplifier
For Low Power Applications Up to
500MHz
The CA3102 consists of two independent differential
amplifiers with associated constant current transistors on a
common monolithic substrate. The six transistors which
comprise the amplifiers are general purpose devices which
exhibit low 1/f noise and a value of fT in excess of 1GHz.
These features make the CA3102 useful from DC to
500MHz. Bias and load resistors have been omitted to
provide maximum application flexibility.
The monolithic construction of the CA3102 provides close
electrical and thermal matching of the amplifiers. This
feature makes this device particularly useful in dual channel
applications where matched performance of the two
channels is required.
The CA3102 has a separate substrate connection for greater
design flexibility.
Features
Power Gain 23dB (Typ) . . . . . . . . . . . . . . . . . . . . 200MHz
Noise Figure 4.6dB (Typ) . . . . . . . . . . . . . . . . . . . 200MHz
Two Differential Amplifiers on a Common Substrate
Independently Accessible Inputs and Outputs
Full Military Temperature Range . . . . . . . -55oC to 125oC
Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
VHF Amplifiers
VHF Mixers
Multifunction Combinations - RF/Mixer/Oscillator;
Converter/IF
IF Amplifiers (Differential and/or Cascode)
Product Detectors
Doubly Balanced Modulators and Demodulators
Balanced Quadrature Detectors
Cascade Limiters
Synchronous Detectors
Balanced Mixers
Synthesizers
Balanced (Push-Pull) Cascode Amplifiers
Sense Amplifiers
Pinout
CA3102
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
(BRAND)
TEMP.
RANGE (oC)
PACKAGE
PKG.
DWG. #
CA3102E
(CA3102E)
-55 to 125
14 Ld PDIP
E14.3
CA3102M
(3102)
-55 to 125
14 Ld SOIC
M14.15
CA3102MZ
(CA3102MZ)
(Note)
-55 to 125
14 Ld SOIC
(Pb-free)
M14.15
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
SUBSTRATE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2002, 2005, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
611.7
Data Sheet
October 12, 2005
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