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參數(shù)資料
| 型號(hào)： | C9851BT |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | PROC SPECIFIC CLOCK GENERATOR, PDSO48 |
| 封裝： | TSSOP-48 |
| 文件頁數(shù)： | 7/13頁 |
| 文件大?。?/td> | 131K |
| 代理商： | C9851BT |
+/+
…when timing is critical
C9851
Clock Generator for Pentium
III Server and Workstation Applications
Preliminary
INTERNATIONAL MICROCIRCUITS, INC. 525 LOS COCHES ST.
1.0
2/1/2000
MILPITAS, CA TEL 408-263-6300, FAX 408-263-6571
Page 3 of 13
http://www.imicorp.com
Maximum Ratings
Maximum Input Voltage Relative to VSS: VSS - 0.5V
Maximum Input Voltage Relative to VSS: VDD + 0.7V
Storage Temperature:
-65C to + 150C
Operating Temperature:
0C to +70C
Maximum ESD protection
2000V
Maximum Power Supply:
5.5V
This device contains circuitry to protect the inputs
against damage due to high static voltages or electric
field; however, precautions should be taken to avoid
application of any voltage higher than the maximum
rated voltages to this circuit. For proper operation, Vin
and Vout should be constrained to the range:
VSS<(Vin or Vout)<VDD
Unused inputs must always be tied to an appropriate
logic voltage level (either VSS or VDD).
DC Parameters (VDDI = VDD = VDDR = VDDL = VDDM = VDDC = 3.3V
±5%, TA = 0°C to +70°C)
Characteristic
Symbol
Min
Typ
Max
Units
Conditions
Input Low Voltage
VIL1
-
0.8
Vdc
Input High Voltage
VIH1
2.0
-
Vdc
Note 1
Input Low Current (@Vin =
VSS)
IIL
-16
-4
A
Input High Current (@Vin =
VDD)
IIH
0
5
A
For internal Pull up resistors, Note 1
and Note 2
-
Input Low Current (@Vin =
VSS)
IIL
0
-
A
Input High Current (@Vin =
VDD)
IIH
4
16
A
For internal Pull down resistors, Note
1 and Note 2
Tri-State leakage Current
Ioz
-
10
A
Static Supply Current
Idd
-
30
mA
PwrDwn=Low
Dynamic Supply Current
Isdd
-
200
A
133 MHz CPU, Note 3
Input pin capacitance
Cin
-
5
pF
Output pin capacitance
Cout
-
6
pF
Pin Inductance
Lpin
-
7
nH
Crystal pin capacitance
Cxtal
34
36
38
pF
Measured from Pin to Ground. See
crystal specification section presented
later in this data sheet.
Crystal Startup time
Txs
-
40
S
From Stable 3.3V power supply.
Internal Pull-up and Pull-
down resistor value
Rpi
200
250
500
K
Note1:
Applicable to input signals: Sel100/133, Sel(A:B)), Spread#, PWRDN#, MultSel(0:1)
Note2:
Although internal pull-up or Pull-Down resistors have a typical value of 250K, this value may vary between 200K and 500K.
Note3:
All outputs loaded as per the maximum capacitive table in this data sheet.
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