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參數(shù)資料
| 型號(hào)： | C9835CY |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems |
| 中文描述： | 低電磁干擾時(shí)鐘發(fā)生器英特爾移動(dòng)133兆赫/ 3的SO - DIMM芯片系統(tǒng) |
| 文件頁數(shù)： | 4/18頁 |
| 文件大小： | 343K |
| 代理商： | C9835CY |
C9835
Document #: 38-07303 Rev. **
Page 4 of 18
Power Management Timing
When exiting the power-down mode, the application must
supply power to the V
DD
pins a minimum of 200 ms before
releasing the PD# pin high to insure that an orderly startup will
occur and that the initial clocks that the device produces are
full and correctly compliant with data sheet specified phase
relationships.
CPU_STP# Timing
CPU_STP# is an input to the clock generator. CPU_STP# is
asserted asynchronously by the external clock control logic
and is internally synchronized to the external PCI_F output. All
other clocks will continue to run while the CPU0 clock is
disabled. The CPU0 is always stopped in a low state and
Note:
7.
All internal timing is referenced to the CPU clock.
8.
CPU_STP# signal is an input signal that is made synchronous to free-running PCI_F.
9.
Diagrams shown with respect to 133 MHz. Similar operation when CPU is 100 MHz.
started in such a manner as to guarantee that the high pulse
width is a full pulse. Only one rising edge of PCI_F occurs after
the clock control logic is switched for the CPU0 output to
become enabled/disabled.
PCI_STP# Timing
PCI_STP# is an input to the clock generator and is made
synchronous to the clock driver PCI_F output. It is used to turn
off the PCI clocks for low power operation. PCI clocks are
stopped in a low state and started such that a full high pulse
width is guaranteed. ONLY one rising edge of PCI_F occurs
after the clock control logic switched for the PCI outputs to
become enabled/disabled.
Table 3. Power Management Current
Conditions
Maximum 2.5V Current Consumption
(V
DDC
= V
DDI
= 2.625)
≤ 1
mA
60 mA
75 mA
90 mA
Maximum 3.3V Current Consumption
(V
DD
= AV
DD
= V
DDS
= 3.465V)
≤ 1
mA
295 mA
295 mA
295 mA
Power-down (PD# = LOW)
CPU = 66 MHz @ max loads
CPU = 100 MHz @ max loads
CPU = 133 MHz @ max loads
0ns
10ns
20ns
30ns
40ns
50ns
60ns
CPU 100 MHz
3V66 66 MHz
PCI 33 MHz
IOAPIC 33 MHz
PD#
SDRAM 100 MHz
REF 14.3 MHz
VCH_CLK , 48M (0,1)
Figure 1.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| C9835CYT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Low-EMI Clock Generator for Intel Mobile 133-MHz/3 SO-DIMM Chipset Systems |
| C-983-6 | 功能描述:烙鐵 PLUS SOLDERING TIP60 RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
| C-983-7 | 功能描述:烙鐵 PLUS SOLDERING TIP70 RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
| C-983-7.5 | 功能描述:烙鐵 PLUS SOLDERING TIP75 RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
| C-983-8 | 功能描述:烙鐵 PLUS SOLDERING TIP80 RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
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