參數(shù)資料
型號(hào): C88F83B0AU-TC-H
廠商: ON Semiconductor
文件頁數(shù): 3/25頁
文件大小: 0K
描述: MCU 16BIT 256K LCD 120-TQFP
標(biāo)準(zhǔn)包裝: 90
核心處理器: Xstormy16
芯體尺寸: 16-位
速度: 4.2MHz
連通性: SIO,UART/USART
外圍設(shè)備: LCD,WDT
輸入/輸出數(shù): 20
程序存儲(chǔ)器容量: 128KB(128K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 2.3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b
振蕩器型: 內(nèi)部
工作溫度: -20°C ~ 75°C
封裝/外殼: 120-TQFP
包裝: 托盤
LC88F83B0A
No.A1228-11/25
Pin Description
Pin Name
I/O
Description
VDD
-
+ power supply pin
VSS
-
- power supply pin
VLCD1 to 4
-
LCD bias power port (capacitor connection port)
LCDVSS0,
LCDVSS1
-
LCD power supply pin
CUP00, 01
-
Switching pin for generating LCD driving voltage
Connect capacitor between both ports.
OSC0
XT1
I
Oscillator circuit for system clock (low speed)
32.768kHz crystal oscillator and capacitor for oscillation connection
XT1: Resistor connection for RC oscillation (RC model)
XT2
O
OSC1
CF1
I
Oscillator circuit for system clock (high speed)
Ceramic oscillator and capacitor for oscillator connection
CF1: Resistance connection for RC oscillator (RC model)
CF2
O
PORT 0
P00 to P07
I/O
8-bit I/O port
I/O specifiable in 1-bit units
Shared pins
P00 to P05 : Interrupt function
P06: Timer 0 PWML output
P07: Timer 0 PWMH output
PORT 1
P10 to P17
I/O
8-bit I/O port
I/O specifiable in 1-bit units
Shared pins
P10: SIO0 data output
P11: SIO0 data input/Bus I/O
P12: SIO0 Clock I/O
P13: Timer 3 PWML output
P14: Timer 3 PWMH output
P16: UART 2 receive
P17: UART 2 send
PORT 2
P20 to P23
I/O
4-bit I/O port
I/O specifiable in 1-bit units
P20 to P23: AD converter input ports (AN0 to AN3)
Shared pins
P20: Timer 4 output
P21: Timer 5 output
COM0 to COM7
O
LCD common output port
COM8/SEG0 to
COM15/SEG7
O
LCD common output port/segment output port
common output/segment output is switched according to the register.
SEG8 to SEG55
O
LCD segment output port
SEG56 to SEG71
I/O
LCD segment output port
SEG71 to SEG56: General purpose Nch OD output/General purpose input
SEG71 to SEG56 can switch LCD output, a general-purpose Nch OD output, and a general-purpose input
(every 4 bits).
SEG71 to SEG64: Interrupt function (every 4 bits)
Selecting sampling frequency for chattering removal (every 4 bits)
Level/edge selection (every 4 bits)
Hi/Low level or rise/fall selection (every 1 bit)
SEG71 to SEG70: Timer 3 external input
RESB
I
Input terminal for system initialization
It operates reset by the “LOW” input.
with pull-up resistor
TST
I/O
TEST pin
On-chip debugger communication terminal
Used with pull-down or VSS
*Connect 100k
Ω between this pin and VSS when on-chip debugger is used.
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