參數(shù)資料
型號： C8051F015-GQ
廠商： Silicon Laboratories Inc
文件頁數(shù)： 41/171頁
文件大?。?/td> 0K
描述： IC 8051 MCU 32K FLASH 64TQFP
產(chǎn)品培訓模塊： Serial Communication Overview
標準包裝： 160
系列： C8051F01x
核心處理器： 8051
芯體尺寸： 8-位
速度： 25MHz
連通性： SMBus（2 線/I²C），SPI，UART/USART
外圍設備： 欠壓檢測/復位，POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 32KB（32K x 8）
程序存儲器類型： 閃存
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b; D/A 2x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 64-TQFP
包裝： 托盤
產(chǎn)品目錄頁面： 621 (CN2011-ZH PDF)
其它名稱： 336-1194
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
18.2.
Multiprocessor Communications
Modes 2 and 3 support multiprocessor communication between a master processor and one or more slave processors
by special use of the ninth data bit. When a master processor wants to transmit to one or more slaves, it first sends
an address byte to select the target(s). An address byte differs from a data byte in that its ninth bit is logic 1; in a
data byte, the ninth bit is always set to logic 0.
Setting the SM2 bit (SCON.5) of a slave processor configures its UART such that when a stop bit is received, the
UART will generate an interrupt only if the ninth bit is logic one (RB8 = 1) signifying an address byte has been
received.
In the UART’s interrupt handler, software will compare the received address with the slave’s own
assigned 8-bit address. If the addresses match, the slave will clear its SM2 bit to enable interrupts on the reception
of the following data byte(s). Slaves that weren’t addressed leave their SM2 bits set and do not generate interrupts
on the reception of the following data bytes, thereby ignoring the data. Once the entire message is received, the
addressed slave resets its SM2 bit to ignore all transmissions until it receives the next address byte.
Multiple addresses can be assigned to a single slave and/or a single address can be assigned to multiple slaves,
thereby enabling “broadcast” transmissions to more than one slave simultaneously. The master processor can be
configured to receive all transmissions or a protocol can be implemented such that the master/slave role is
temporarily reversed to enable half-duplex transmission between the original master and slave(s).
Figure 18.7. UART Multi-Processor Mode Interconnect Diagram
Master
Device
Slave
Device
TX
RX
TX
Slave
Device
RX
TX
Slave
Device
RX
TX
VDD
135
Rev. 1.7
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相關代理商/技術參數(shù)
參數(shù)描述
C8051F015-GQR 功能描述:8位微控制器 -MCU 32KB 10ADC 64Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F015R 功能描述:8位微控制器 -MCU C +-10Bit 64Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
C8051F015TB 功能描述:開發(fā)板和工具包 - 8051 USE 634-C8051F005TB RoHS:否 制造商:Silicon Labs 產(chǎn)品:Development Kits 工具用于評估:C8051F960, Si7005 核心: 接口類型:USB 工作電源電壓:
C8051F015-TB 功能描述:BOARD PROTOTYPING W/C8051F015 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 過時/停產(chǎn)零件編號 系列:- 標準包裝:1 系列:- 類型:MCU 適用于相關產(chǎn)品:Freescale MC68HC908LJ/LK（80-QFP ZIF 插口） 所含物品:面板、纜線、軟件、數(shù)據(jù)表和用戶手冊 其它名稱:520-1035
C8051F016 功能描述:8位微控制器 -MCU 32KB 10ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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