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參數(shù)資料
| 型號(hào)： | BW1227L |
| 英文描述： | Rad hard low voltage CMOS 16-bit D-type Flip-Flop (3-state) with 3.6 V tolerant inputs and outputs |
| 中文描述： | BW1227L 10位500KSPS / 8位650KSPS ADC的|數(shù)據(jù)資料 |
| 文件頁(yè)數(shù)： | 4/11頁(yè) |
| 文件大?。?/td> | 140K |
| 代理商： | BW1227L |
BW1223X
8BIT 40MSPS ADC
SEC ASIC
ANALOG
DC
ELECTRICAL
CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Conditions
Resolution
-
-
8
-
Bits
-
Reference Current
IREF
-
6.25
-
mA
VRT : 2.6V
VRB : 0.6V
Differential Linearity Error
DLE
-
±
0.3
±
0.5
LSB
AIN : 0.6 ~ 2.6V
(Ramp Input)
Integral Linearity Error
ILE
-
±
0.5
±
0.8
LSB
F
s
: 1MHz
20MHz
Bottom Offset Voltage Error
EOB
-
±
6.3
±
6.5
LSB
EOB = AIN(0,1) - VRB
Top Offset Voltage Error
EOT
-
±
5.4
±
5.6
LSB
EOT = VRT - AIN(254,255)
NOTES
1. Converter Specifications (unless otherwise specified)
VDDA=3.3V
VDDD=3.3V
VSSA=GND
VSSD=GND
VRT=2.6V
VRB=0.6V
Ta=25°C
2. TBD : To Be Determined
AC ELECTRICAL
CHARACTERISTICS
Characteristics
Symbol
Min
Typ
Max
Unit
Conditions
Clock High Time
T
pwh
-
16.6
-
ns
-
Clock Low Time
T
pwl
-
16.6
-
ns
Conversion Rate
F
s
40
-
-
MSPS
Dynamic Supply Current
I
s
(IREF)
-
20
(6.25)
-
mA
I
s
= I(VDDA) + I(VDDD)
+ IREF
F
s
: 40MHz
Digital Output Data Delay
t
d
-
10
20
ns
See
"DELAY TIMING DIAGRAM"
Signal to
Noise Distortion
Ratio (SNDR)
SNR1
SNR2
SNR3
38
42
42
42
-
dB
AIN : 1, 2, 4MHz respectively
(Sine Input)
F
s
: 40MHz
4 / 11
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