參數(shù)資料
型號(hào): BUK9640
廠商: NXP Semiconductors N.V.
英文描述: TrenchMOS transistor Logic level FET
中文描述: TrenchMOS晶體管邏輯電平場(chǎng)效應(yīng)管
文件頁數(shù): 4/9頁
文件大?。?/td> 74K
代理商: BUK9640
Philips Semiconductors
Product specification
TrenchMOS
transistor
Logic level FET
BUK9540-100A
BUK9640-100A
Fig.5. Typical output characteristics, T
j
= 25 C
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance, T
j
= 25 C
R
DS(ON)
= f(I
D
); parameter V
GS
Fig.7. Typical on-state resistance, T
= 25 C
R
DS(ON)
= f(V
GS
); conditions: I
D
= 25 A;
Fig.8. Typical transfer characteristics.
I
D
= f(V
GS
); conditions: V
DS
= 25 V; parameter T
j
Fig.9. Typical transconductance, T
= 25 C
g
fs
= f(I
D
); conditions: V
DS
= 25 V
Fig.10. Normalised drain-source on-state resistance.
a = R
DS(ON)
/R
DS(ON)25 C
= f(T
j
); I
D
= 25 A; V
GS
= 5 V
0
20
40
60
80
100
120
0
2
4
6
8
10
VDS/V
ID/A
2.4
2.6
2.8
3.0
3.2
3.4
3.6
3.8
5.0
10.0
VGS/V =
0
5
10
15
20
25
30
35
40
0
1
2
3
4
5
6
7
8
9
10
Gate-source voltage, VGS (V)
Drain current, ID (A)
VDS > ID X RDS(ON)
Tj = 25 C
175 C
20
25
30
35
40
45
50
10
20
30
40
50
60
70
VDS/V
ID/A
3.0
3.2
3.4
3.6
4.0
5.0
0
10
20
30
40
50
60
70
0
10
20
30
40
ID/A
gfs/S
26
28
30
32
34
36
38
3
4
5
6
7
8
9
10
VGS/V
R
0.5
1
1.5
2
2.5
3
-100
-50
0
50
100
150
200
Tmb / degC
a
Rds(on) normalised to 25degC
December 1999
4
Rev 1.000
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