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| 型號(hào)： | BUK6228-55C |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 功率晶體管 |
| 英文描述： | N-channel TrenchMOS intermediate level FET |
| 中文描述： | 31 A, 55 V, 0.044 ohm, N-CHANNEL, Si, POWER, MOSFET, TO-252 |
| 封裝： | PLASTIC, SC-63, DPAK-3 |
| 文件頁(yè)數(shù)： | 6/14頁(yè) |
| 文件大小： | 196K |
| 代理商： | BUK6228-55C |
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BUK6228-55C
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 01 — 4 October 2010
6 of 14
NXP Semiconductors
BUK6228-55C
N-channel TrenchMOS intermediate level FET
6.
Characteristics
Table 6.
Symbol
Static characteristics
V
(BR)DSS
Characteristics
Parameter
Conditions
Min
Typ
Max
Unit
drain-source breakdown
voltage
I
D
= 250 μA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 μA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
see
Figure 9
; see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
see
Figure 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
see
Figure 10
V
DS
= 55 V; V
GS
= 0 V; T
j
= 175 °C
V
DS
= 55 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 0 V; V
GS
= 20 V; T
j
= 25 °C
V
DS
= 0 V; V
GS
= -20 V; T
j
= 25 °C
V
GS
= 10 V; I
D
= 10 A; T
j
= 25 °C;
see
Figure 11
V
GS
= 5 V; I
D
= 10 A; T
j
= 25 °C;
see
Figure 11
V
GS
= 4.5 V; I
D
= 10 A; T
j
= 25 °C;
see
Figure 11
V
GS
= 10 V; I
D
= 10 A; T
j
= 175 °C;
see
Figure 12
; see
Figure 11
55
50
1.8
-
-
2.3
-
-
2.8
V
V
V
V
GS(th)
gate-source threshold voltage
-
-
3.3
V
0.8
-
-
V
I
DSS
drain leakage current
-
-
-
-
-
-
0.02
2
2
24.8
500
1
100
100
29
μA
μA
nA
nA
m
I
GSS
gate leakage current
R
DSon
drain-source on-state
resistance
-
30.3
38
m
-
32.9
44
m
-
-
64
m
Dynamic characteristics
Q
G(tot)
total gate charge
I
D
= 25 A; V
DS
= 44 V; V
GS
= 5 V;
see
Figure 13
; see
Figure 14
I
D
= 25 A; V
DS
= 44 V; V
GS
= 10 V;
see
Figure 13
; see
Figure 14
-
11
-
nC
-
-
-
-
-
-
-
-
-
-
-
20.2
3.73
5.76
1003
102
70
6.6
21.9
22.5
10.6
3.5
-
-
-
1340
123
96
-
-
-
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
nH
Q
GS
Q
GD
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
L
D
gate-source charge
gate-drain charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain inductance
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
T
j
= 25 °C; see
Figure 15
V
DS
= 45 V; R
L
= 1.8
; V
GS
= 10 V;
R
G(ext)
= 10
from upper edge of drain mounting
base to centre of die ; T
j
= 25 °C
from source lead to source bond
pad ; T
j
= 25 °C
L
S
internal source inductance
-
7.5
-
nH
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