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參數(shù)資料
| 型號： | BUK148-50DL |
| 英文描述： | TRANSISTOR | MOSFET | N-CHANNEL | 50V V(BR)DSS | 8A I(D) | TO-220VAR |
| 中文描述： | 晶體管| MOSFET的| N溝道| 50V五（巴西）直| 8A條（丁）|對220VAR |
| 文件頁數(shù)： | 4/6頁 |
| 文件大小： | 37K |
| 代理商： | BUK148-50DL |
Philips Semiconductors
Product specification
Logic level TOPFET
BUK148-50DL
INPUT CHARACTERISTICS
The supply for the logic and overload protection is taken from the input.
Limits are for -40C
≤
T
mb
≤
150C; typicals are for T
mb
= 25C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
IS(TO)
Input threshold voltage
V
DS
= 5 V; I
D
= 1 mA
0.6
1.1
-
2.4
2.1
V
V
T
mb
= 25C
V
IS
= 5 V
V
IS
= 4 V
V
IS
= 5 V
V
IS
= 3 V
1.6
I
IS
Input supply current
normal operation;
100
80
220
195
400
330
μ
A
μ
A
μ
A
μ
A
I
ISL
Input supply current
protection latched;
200
130
400
250
650
430
V
ISR
t
lr
V
(CL)IS
R
IG
Protection reset voltage
1
reset time t
r
≥
100
μ
s
V
IS1
= 5 V, V
IS2
< 1 V
I
I
= 1.5 mA
1.5
2
2.9
V
Latch reset time
10
40
100
μ
s
Input clamping voltage
5.5
-
8.5
V
Input series resistance
2
to gate of power MOSFET
T
mb
= 25C
-
33
-
k
SWITCHING CHARACTERISTICS
T
mb
= 25 C; V
DD
= 13 V; resistive load R
L
= 4
. Refer to waveform figure and test circuit.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
t
d on
t
r
t
d off
t
f
Turn-on delay time
V
IS
= 5 V
-
8
20
μ
s
μ
s
μ
s
μ
s
Rise time
-
20
50
Turn-off delay time
V
IS
= 0 V
-
25
70
Fall time
-
16
40
1
The input voltage below which the overload protection circuits will be reset.
2
Not directly measureable from device terminals.
May 2001
4
Rev 1.100
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