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參數(shù)資料
| 型號： | BU9877FV |
| 廠商： | Rohm CO.,LTD. |
| 英文描述： | Serial interface IC for DIMMs supporting plug & play |
| 中文描述： | 對DIMM的串行接口芯片，支持即插即用 |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 95K |
| 代理商： | BU9877FV |
7
Memory ICs
BU9877FV
(10) Timing charts
SCL
Start condition
Stop condition
SDA
1
1
0
0
Slave address
Word address
Write data
ACK signal (output)
A2
A1
A0
0
WA7
WA6
WA0
D7
D0
1
8
9
17
18
26
27
Fig. 7 Byte write cycle
Data is written to the address specified by the word address (n address).
After 8 bits of data are input, a stop bit is generated. This initiates writing of the data to the memory cell.
Fig. 8 Current read cycle
SCL
Start condition
Stop condition
SDA
1
1
0
0
Slave address
Read data
ACK signal (output)
ACK signal (input)
A2
A1
A0
1
D7
D6
D5
D2
D1
D0
1
1
8
9
18
This IC has an internal circuit address counter to store the previously accessed address in the memory. If the pre-
vious command was a write command, the write word address data (n) is read, and if the previous command was
a read command, the read word address data (n) incremented by one address (n + 1) is read.
If the ACK signal LOW following D0 is detected and no stop condition is sent from the master side, reading can be
continued sequentially to the next data.
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