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參數(shù)資料
| 型號(hào)： | BU1572GUW-E2 |
| 廠商： | Rohm Semiconductor |
| 文件頁(yè)數(shù)： | 6/9頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC VID PROCESSER AIE RT 63VBGA |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類(lèi)型： | 適應(yīng)型圖形增強(qiáng)器（AIE） |
| 應(yīng)用： | 視頻播放器 |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 63-VFBGA |
| 供應(yīng)商設(shè)備封裝： | 63-VBGA |
| 包裝： | 帶卷 (TR) |
74LVC1G57
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 6 — 6 December 2011
4 of 20
NXP Semiconductors
74LVC1G57
Low-power configurable multiple function gate
7.1 Logic configurations
Table 5.
Function selection table
Logic function
Figure
2-input AND
see Figure 5
2-input AND with both inputs inverted
see Figure 8
2-input NAND with inverted input
2-input OR with inverted input
2-input NOR
see Figure 8
2-input NOR with both inputs inverted
see Figure 5
2-input XNOR
see Figure 9
Inverter
see Figure 10
Buffer
see Figure 11
Fig 5.
2-input AND gate or 2-input NOR gate with
both inputs inverted
Fig 6.
2-input NAND gate with input B inverted or
2-input OR gate with inverted C input
001aab584
B
B6
Y
C
1
5
2
4
3Y
Y
C
B
C
VCC
001aab585
B
B6
Y
C
1
5
2
4
3Y
Y
C
B
C
VCC
Fig 7.
2-input NAND gate with input C inverted or
2-input OR gate with inverted A input
Fig 8.
2-input NOR gate or 2-input AND gate with
both inputs inverted
001aab586
A
6
Y
C
1
5
2
4
3Y
Y
C
A
C
VCC
001aab587
A
6C
1
5
2
4
3Y
VCC
A
Y
C
Y
A
C
Fig 9.
2-input XNOR gate
Fig 10. Inverter
001aab588
B6
C
1
5
2
4
3Y
VCC
Y
B
C
001aab589
A
6
Y
1
5
2
4
3Y
VCC
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