參數(shù)資料
型號： BU-65743F3-210
廠商： DATA DEVICE CORP
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80
封裝： 0.880 INCH, CERAMIC, QFP-80
文件頁數(shù)： 48/75頁
文件大?。?/td> 532K
代理商： BU-65743F3-210
52
Data Device Corporation
www.ddc-web.com
BU-65743/65843/65863/65864
D-06/04-0
TX/RX-A (I/O)
D1, D2, E1
Analog Transmit/Receive Input/Outputs. Connect directly to 1553 isolation
transformers. For BGA versions, connect all balls of the signal together.
TX/RX-A (I/O)
G1, H1, H2
TX/RX-B (I/O)
U11, V11, V12
TX/RX-B (I/O)
U15, V14, V15
TABLE 69. 1553 ISOLATION TRANSFORMER INTERFACE
(BU-65XXXX8/X9/X3/X4 VERSIONS)
SIGNAL NAME
DESCRIPTION
5V
BALL
D1, D2, E1, E2
G1, G2, H1, H2
L1, L2, M1, M2
P1, P2, R1, R2
3V
BALL
3
5
15
17
PIN
TXDATA_A (O)
3
DIGITAL MANCHESTER BIPHASE TRANSMIT OUTPUTS, A BUS
TXDATA_A (O)
5
RXDATA_A (I)
8
RXDATA_A (I)
4
TABLE 70. INTERFACE TO EXTERNAL TRANSCEIVER
(BU-65XXXF(G)0 VERSIONS)
SIGNAL NAME
DESCRIPTION
PIN
DIGITAL MANCHESTER BIPHASE RECEIVE INPUTS, A BUS
TX_INH_A_OUT (O)
11
DIGITAL OUTPUT TO INHIBIT EXTERNAL TRANSMITTER, A BUS
TXDATA_B (O)
15
TXDATA_B (O)
17
RXDATA_B (I)
21
DIGITAL MANCHESTER BIPHASE TRANSMIT OUTPUTS, B BUS
DIGITAL MANCHESTER BIPHASE RECEIVE INPUTS, B BUS
RXDATA_B (I)
16
TX_INH_B_OUT (O)
9
DIGITAL OUTPUT TO INHIBIT EXTERNAL TRANSMITTER, B BUS
SNGL_END (I)
No Connect "NC"
If SNGL_END is connected to logic "0" the Manchester decoder inputs
(RX_DATA_IN_X) will be configured to accept single-ended input sig-
nals (e.g.,MIL-STD-1773 fiber optic receiver outputs). If SNGL_END is
connected to logic "1," the decoder inputs will be configured to accept
standard double-ended Manchester bi-phase input signals (i.e., MIL-
STD-1553 receiver outputs).
Do NOT connect these two signals together.
Connect TXINH_OUT (Digital transmit inhibit output) to the TX INH
input of external MIL-STD-1553 transceivers. Asserted high to inhibit
when not transmitting on the respective bus.
TXINH_IN_A (I)
These two signals
MUST be directly
connected for nor-
mal "Built-In" trans-
ceiver operation.
TXINH_OUT_A
(O)
TABLE 71. MANDATORY ADDITIONAL CONNECTIONS & INTERFACE TO EXTERNAL TRANSCEIVER
(BGA’S ONLY)
SIGNAL NAME
FOR USE WITH EXTERNAL TRANSCEIVERS
"TRANSCEIVERLESS"
DESIGN USES
INTERNAL
TRANSCEIVERS
A15
A4
A5
D14
E7
E8
BU-65843B3
BU-65864B3
BU-65843B8
BU-65863B8
BALL
NOTE: The BGA versions can be operated with either their internal transceivers or with external transceivers. When the devices are operated with their internal trans-
ceivers the customer must supply PCB traces that connect the device's "inputs to outputs" (within the correct column) as described in this table. For example, to operate
the BU-65843B8/BU-65863B8 with their internal transceivers, PCB traces must connect E7 to E8, C7 to C8, D7 to D8, etc..
相關PDF資料
PDF描述
BU-65843F3-320 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CQFP80
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