參數(shù)資料
型號(hào): BR24L01
廠商: Rohm CO.,LTD.
英文描述: 128】8 bit electrically erasable PROM
中文描述: 128】8位電可擦除可編程ROM
文件頁(yè)數(shù): 7/26頁(yè)
文件大小: 391K
代理商: BR24L01
BR24L01A-W / BR24L01AF-W / BR24L01AFJ-W /
Memory ICs
BR24L01AFV-W / BR24L01AFVM-W
7/25
z
WP timing
SCL
SDA
WP
t
HD : WP
t
WR
STOP BIT
ACK
ACK
D1
DATA (n)
DATA (1)
t
SU : WP
D0
Fig.6(a) WP TIMING OF THE WRITE OPERATION
SCL
SDA
WP
ACK
ACK
D1
DATA (n)
DATA (1)
t
HIGH : WP
D0
Fig.6(b) WP TIMING OF THE WRITE CANCEL OPERATION
For the WRITE operation, WP must be “LOW” during the period of time from the rising edge of the clock which takes in
D0 of first byte until the end of t
WR
. ( See Fig.6 (a) )
During this period, WRITE operation is canceled by setting WP “HIGH”. ( See Fig.6 (b) )
In the case of setting WP “HIGH” during t
WR
, WRITE operation is stopped in the middle and the data of accessing
address is not guaranteed. Please write correct data again in the case.
相關(guān)PDF資料
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BR24L04F-W 512】8 bit electrically erasable PROM
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