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參數(shù)資料
| 型號： | BR24E16 |
| 廠商： | Rohm CO.,LTD. |
| 元件分類： | DRAM |
| 英文描述： | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| 中文描述： | 該CAT24FC02是一個2 KB的EEPROM的國內(nèi)256個8位每字舉辦的串行CMOS |
| 文件頁數(shù)： | 4/12頁 |
| 文件大小： | 298K |
| 代理商： | BR24E16 |
BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /
Memory Ics
BR24C16FJ /
BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV
z
Timing charts
t
BUF
t
DH
t
PD
t
HIGH
t
HD
:
STA
t
LOW
t
F
t
R
SDA
(IN)
SDA
(OUT)
SCL
START BIT
STOP BIT
SCL
SDA
Data is read on the rising edge of SCL.
Data is output in synchronization with the falling edge of SCL.
t
SU
:
DAT
t
HD
:
DAT
t
SU
:
STO
t
HD
:
STA
t
SU
:
STA
Fig.1 Synchronized data input / output timing
ACK
D0
t
WR
SDA
SCL
START CONDITION
STOP CONDITION
Write data (n)
Fig.2 Write cycle timing
z
Circuit operation
(1) Start condition (recognition of start bit)
Before executing any command, when SCL is HIGH, a start condition (start bit) is required to cause SDA to fall from
HIGH to LOW. This IC is designed to constantly detect whether there is a start condition (start bit) for the SDA and
SCL line, and no commands will be executed unless this condition is satisfied.
(See Fig.1 for the synchronized data input / output timing.)
(2) Stop condition (recognition of stop bit)
To stop any command, a stop condition (stop bit) is required. A stop condition is achieved when SDA goes from LOW
to HIGH while SCL is HIGH. This enables commands to be completed.
(See Fig.1 for the synchronized data input / output timing.)
(3) Precautions concerning write commands
In the WRITE mode, the transferred data is not written to the memory unless the stop bit is executed.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| BR24E16F | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| BR24E16FJ | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| BR24E16FV | The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each |
| BR24L02FV-W | 256x8 bit electrically erasable PROM |
| BR24L02FVM-W | 256x8 bit electrically erasable PROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BR24E16F | 制造商:ROHM 制造商全稱:Rohm 功能描述:I2C BUS compatible serial EEPROM |
| BR24E16FJ | 制造商:ROHM 制造商全稱:Rohm 功能描述:I2C BUS compatible serial EEPROM |
| BR24E16FV | 制造商:ROHM 制造商全稱:Rohm 功能描述:I2C BUS compatible serial EEPROM |
| BR24G01-3 | 制造商:ROHM 制造商全稱:Rohm 功能描述:Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire) |
| BR24G01-3A | 制造商:ROHM 制造商全稱:Rohm 功能描述:Serial EEPROM series Standard EEPROM |
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