
Voltage Thresholds
In conjunction with monitoring V
SR
for charge/discharge
currents, the bq2050 monitors the battery potential
through the SB pin. The voltage is determined through
a resistor-divider network per the following equation:
RB1
RB2
2N
=
 1
where N is the number of cells, RB1 is connected to the
positive battery terminal, and RB2 is connected to the
negative battery terminal. The single-cell battery volt-
age is monitored for the end-of-discharge voltage (EDV).
EDV threshold levels are used to determine when the
battery has reached an “empty”state.
Two EDV thresholds for the bq2050 are programmable
with the default values fixed at:
EDV1 (early warning) = 1.52V
EDVF (empty) = 1.47V
If V
SB
is below either of the two EDV thresholds, the as-
sociated flag is latched and remains latched, independ-
ent of V
SB
, until the next valid charge. The V
SB
value is
also available over the serial port.
During discharge and charge, the bq2050 monitors V
SR
for various thresholds used to compensate the charge
and discharge rates. Refer to the count compensation
section for details.
EDV monitoring is disabled if the
discharge rate is greater than 2C (typical) and resumes
12
second after the rate falls below 2C.
RBI Input
The RBI input pin is intended to be used with a storage ca-
pacitor or external supply to provide backup potential to the
internal bq2050 registers when V
CC
 drops below 3.0V. V
CC
is output on RBI when V
CC
 is above 3.0V. A diode is re-
quiredtoisolatetheexternalsupply.
Reset
The bq2050 can be reset either by removing V
CC
 and
grounding the RBI pin for 15 seconds or by writing 0x80
to register 0x39.
Temperature
The bq2050 internally determines the temperature in
10°C steps centered from approximately -35°C to +85°C.
The temperature steps are used to adapt charge and dis-
charge rate compensations, self-discharge counting, and
available charge display translation. The temperature
range is available over the serial port in 10°C incre-
ments as shown in the following table:
Layout Considerations
The bq2050 measures the voltage differential between
the SR and V
SS
 pins. V
OS
 (the offset voltage at the SR
pin) is greatly affected by PC board layout. For optimal
results, the PC board layout should follow the strict rule
of a single-point ground return. Sharing high-current
ground with small signal ground causes undesirable
noise on the small signal nodes. Additionally:
The capacitors (C1 and C2) should be placed as
close as possible to the V
CC
and SB pins,
respectively, and their paths to V
SS
should be as
short as possible. A high-quality ceramic capacitor
of 0.1
μ
f is recommended for V
CC
.
The sense resistor capacitor should be placed as close
as possible to the SR pin.
The sense resistor (R
S
) should be as close as possible to
the bq2050.
4
bq2050
TMP (hex)
Temperature Range
0x
< -30°C
1x
-30°C to -20°C
2x
-20°C to -10°C
3x
-10°C to 0°C
4x
0°C to 10°C
5x
10°C to 20°C
6x
20°C to 30°C
7x
30°C to 40°C
8x
40°C to 50°C
9x
50°C to 60°C
Ax
60°C to 70°C
Bx
70°C to 80°C
Cx
> 80°C