參數(shù)資料
型號(hào): BH29NB1WHFV
元件分類: 固定正電壓?jiǎn)温份敵鰳?biāo)準(zhǔn)穩(wěn)壓器
英文描述: 2.9 V FIXED POSITIVE REGULATOR, PDSO5
封裝: PLASTIC, HVSOF-5
文件頁(yè)數(shù): 7/9頁(yè)
文件大小: 297K
代理商: BH29NB1WHFV
Technical Note
BH
□□
NB1WHFV series
7/8
www.rohm.com
2011 ROHM Co., Ltd. All rights reserved.
2011.01 - Rev.B
8. GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
9. Back Current
In applications where the IC may be exposed to back current flow, it is recommended to create a path to dissipate this
current by inserting a bypass diode between the VIN and VOUT pins.
10. Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to
stress. Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting
it to or removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an
antistatic measure. Use similar precaution when transporting or storing the IC.
11. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a
parasitic diode or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes
operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Fig.32 Example of IC structure
Fig. 31 Example Bypass Diode Connection
VIN
STBY
GND
OUT
Back current
Resistor
Transistor (NPN)
N
N
N
P
+
P
+
P
P substrate
GND
Parasitic element
Pin A
N
N
P
+
P
+
P
P substrate
GND
Parasitic element
Pin B
C
B
E
N
GND
Pin A
Parasitic
element
Pin B
Other adjacent elements
E
B
C
GND
Parasitic
element
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