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參數(shù)資料
| 型號： | B9946 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 3.3V, 160-MHz, 1:10 Clock Distribution Buffer |
| 中文描述： | 3.3伏，160兆赫，1:10時鐘分配緩沖區(qū) |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 57K |
| 代理商： | B9946 |
B9946
Document #: 38-07077 Rev. *C
Page 3 of 5
Maximum Ratings
[2]
Maximum Input Voltage Relative to V
SS
:............ V
SS
–
0.3V
Maximum Input Voltage Relative to V
DD
:.............V
DD
+ 0.3V
Storage Temperature: ................................
–
65
°
C to + 150
°
C
Operating Temperature:................................
–
40
°
C to +85
°
C
Maximum ESD Protection.............................................. 2 KV
Maximum Power Supply: ................................................5.5V
Maximum Input Current:
..................................................±
20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any volt-
age higher than the maximum rated voltages to this circuit. For
proper operation, V
in
and V
out
should be constrained to the
range:
V
SS
< (V
in
or V
out
) < V
DD
Unused inputs must always be tied to an appropriate logic volt-
age level (either V
SS
or V
DD
).
Notes:
2.
3.
4.
5.
6.
7.
8.
9.
The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
Inputs have pull-up/pull-down resistors that effect input current.
Driving series or parallel terminated 50
(or 50
to V
/2) transmission lines.
P
arameters are guaranteed by design and characterization. Not 100% tested in production. All parameters specified with loaded outputs.
Outputs driving 50
transmission lines.
50% input duty cycle.
Outputs loaded with 30 pF each
Part-to-Part skew at a given temperature and voltage.
DC Parameters:
V
DDC
= 3.3V ±10%, V
DD
= 3.3V ±10%, T
A
=
–
40
°
C to +85
°
C
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
C
in
Description
Conditions
Min.
V
SS
2.0
Typ.
Max.
0.8
V
DD
–
100
100
0.4
Unit
V
V
μA
μA
V
V
mA
pF
Input Low Voltage
Input High Voltage
Input Low Current (@V
IL
= V
SS
)
Input High Current (@V
IL
=V
DD
)
Output Low Voltage
Output High Voltage
Quiescent Supply Current
Input Capacitance
Note 3
I
OL
= 20 mA, Note 4
I
OH
=
–
20 mA, V
DDC
= 3.3V, Note 4
All V
DDC
and V
DD
2.5
-
-
1
-
2
4
AC Parameters
[5]
:
V
DDC
= 3.3V ±10%, V
DD
= 3.3V ±10%, T
A
=
–
40
°
C to +85
°
C
Parameter
Fmax
Tpd
FoutDC
tpZL, tpZH
tpLZ, tpHZ
Tskew
Tskew(pp)
Tr/Tf
Description
Conditions
Min.
160
5.0
Typ.
Max.
Unit
MHz
ns
ns
ns
ns
ps
ns
ns
Maximum Input Frequency
[6]
TTL_CLK to Q Delay
[6]
Output Duty Cycle
[6,7]
Output enable time (all outputs)
Output disable time (all outputs)
Output-to-Output Skew
[6,8]
Part-to-Part Skew
[9]
Output Clocks Rise/Fall Time
[8]
-
11.5
Measured at V
DDC
/2
TCYCLE/2
–
1
2
2
TCYCLE/2 + 1
10
10
250
4.5
1.0
2.0
0.8V to 2.0V
0.10
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PDF描述 |
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| B9946CA | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 160-MHz, 1:10 Clock Distribution Buffer |
| B9947 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 160-MHz, 1:9 Clock Distribution Buffer |
| B9947CA | 制造商: 功能描述: 制造商:undefined 功能描述: |
| B9948 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 160-MHz, 1:12 Clock Distribution Buffer |
| B9948CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TWELVE DISTRIBUTED-OUTPUT CLOCK DRIVER|TQFP|32PIN|PLASTIC |
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