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參數(shù)資料
| 型號(hào)： | B9946CA |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時(shí)鐘及定時(shí) |
| 英文描述： | 3.3V, 160-MHz, 1:10 Clock Distribution Buffer |
| 中文描述： | 9946 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | TQFP-32 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大小： | 57K |
| 代理商： | B9946CA |
3.3V, 160-MHz, 1:10 Clock Distribution Buffer
B9946
Cypress Semiconductor Corporation
Document #: 38-07077 Rev. *C
3901 North First Street
San Jose
CA 95134
Revised December 22, 2002
408-943-2600
Product Features
160-MHz Clock Support
LVCMOS/LVTTL Compatible Inputs
10 Clock Outputs: Drive up to 20 Clock Lines
1X or 1/2X Configurable Outputs
Output Three-state Control
250 ps Maximum Output-to-Output Skew
Pin Compatible with MPC946
Industrial Temp. Range: –40°C to +85°C
32-Pin TQFP Package
Description
The B9946 is a low-voltage clock distribution buffer with the
capability to select one of two LVCMOS/LVTTL compatible in-
put clocks. These clock sources can be used to provide for test
clocks as well as the primary system clocks. All other control
inputs are LVCMOS/LVTTL compatible. The 10 outputs are
3.3V LVCMOS or LVTTL compatible and can drive two series
terminated 50
transmission lines. With this capability the
B9946 has an effective fanout of 1:20.
The B9946 is capable of generating 1X and 1/2X signals from
a 1X source. These signals are generated and retimed inter-
nally to ensure minimal skew between the 1X and 1/2X sig-
nals. SEL(A:C) inputs allow flexibility in selecting the ratio of
1X to1/2X outputs.
The B9946 outputs can also be three-stated via MR/OE# in-
put. When MR/OE# is set HIGH, it resets the internal flip-flops
and three-states the outputs.
Pin Configuration
B9946
M
V
Q
V
Q
V
Q
V
V
Q
V
Q
V
Q
V
Q
VSS
QB0
VDDC
QB1
VSS
QB2
VDDC
VDDC
TCLK_SEL
VDD
TCLK0
TCLK1
DSELA
DSELB
DSELC
VSS
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
9
1
1
1
1
1
1
1
3
3
3
2
2
2
2
2
3
QA0:2
3
QB0:2
4
QC0:3
0
1
0
1
0
1
0
1
/1
/2
R
TCLK0
TCLK_SEL
TCLK1
DSELA
DSELB
DSELC
MR/OE#
Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| B9947 | 3.3V, 160-MHz, 1:9 Clock Distribution Buffer |
| B9947CA | 3.3V, 160-MHz, 1:9 Clock Distribution Buffer |
| b9s | 0.5A SURFACE MOUNT GLASS PASSIVATED BRIDGE RECTIFIER |
| BA-3G12UW | green chips, which are made from GaP on GaP substrate. |
| BA-3S12UW | red chips, which are made from GaAlAs on GaAs substrate. |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| B9947 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 160-MHz, 1:9 Clock Distribution Buffer |
| B9947CA | 制造商: 功能描述: 制造商:undefined 功能描述: |
| B9948 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V, 160-MHz, 1:12 Clock Distribution Buffer |
| B9948CA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:TWELVE DISTRIBUTED-OUTPUT CLOCK DRIVER|TQFP|32PIN|PLASTIC |
| B9948L | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2.5V/3.3V, 160-MHz, 1:12 Clock Distribution Buffer |
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