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參數(shù)資料
| 型號(hào)： | AZV99NA |
| 廠商： | Arizona Microtek, Inc. |
| 英文描述： | PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| 中文描述： | PECL的/ LVDS的振蕩器的增益級(jí) |
| 文件頁(yè)數(shù)： | 1/15頁(yè) |
| 文件大?。?/td> | 236K |
| 代理商： | AZV99NA |
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AZV99
PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable
1630 S. STAPLEY DR., SUITE 127
MESA, ARIZONA 85204
USA
(480) 962-5881
FAX (480) 890-2541
www.azmicrotek.com
ARIZONA MICROTEK, INC.
FEATURES
Green and RoHS Compliant /
Lead (Pb) Free Packages Available
Similar Operation as AZ100LVEL16VT
except with
LVDS Outputs
Operating Range of 3.0V to 5.5V
Minimizes External Components
Selectable Enable Polarity and
Threshold (CMOS/TTL or PECL)
Available in a 2x2 or 3x3mm
MLP Package
S–Parameter (.s2p) and IBIS Model
Files Available on Arizona Microtek
Website
DESCRIPTION
The AZV99 is a specialized oscillator gain stage with LVDS output buffer including an enable. The enable
input (EN) allows continuous oscillator operation by only controlling the Q
HG
/Q
HG
outputs.
The AZV99 also provides a V
BB
and 470
Ω
internal bias resistors from D to V
BB
and D to V
BB
. The V
BB
pin can
support 1.5 mA sink/source current. Bypassing V
BB
to ground with a 0.01
μ
F capacitor is recommended.
MLP 16, 3x3 mm Package (L) or DIE (X)
The MLP 16 and die versions of the AZV99 provide a selectable enable (EN). Enable polarity and threshold can
be selected to accommodate either CMOS/TTL or PECL input levels. See the enable truth table for enable function.
If enable pull-up is desired in the CMOS/TTL mode, an external
≤
20k
Ω
resistor connecting EN to V
CC
will override
the on-chip pull-down resistor.
Outputs Q/Q each have a selectable on-chip pull-down current source. See the current source truth table for
current source functions. External resistors may also be used to increase pull-down current to a maximum of 25mA
(includes internal on-chip current source).
PACKAGE AVAILABILITY
PART NUMBER
PACKAGE
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead (Pb)
Free
MARKING
NOTES
AZV99NG
V1G
<Date Code>
1,2
MLP 8 (2x2x0.75)
AZV99NA
V9
<Date Code>
1,2
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead (Pb)
Free
MLP 8 (2x2x0.75)
Green / RoHS
Compliant / Lead (Pb)
Free
MLP 16 (3x3) Green /
RoHS Compliant /
Lead (Pb) Free
TSSOP 8 RoHS
Compliant / Lead (Pb)
Free
DIE
1
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape &
Reel.
2
Date code format: “Y” for year followed by “WW” for week.
3
Date Code “YWW” on underside of part.
4
Waffle Pack
AZV99NBG
V8G
<Date Code>
1,2
AZV99NDG
V2G
<Date Code>
1,2
AZV99LG
AZMG
V99
<Date Code>
1,2
AZV99T+
AZ+
V99
1,2,3
AZV99XP
N/A
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AZV99NBG | PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| AZV99NDG | PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| AZV99NG | PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| B048A120M20 | VI Chip - BCM Bus Converter Module |
| B048A120T20 | VI Chip - BCM Bus Converter Module |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AZV99NBG | 制造商:AZM 制造商全稱(chēng):AZM 功能描述:PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| AZV99NDG | 制造商:AZM 制造商全稱(chēng):AZM 功能描述:PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| AZV99NG | 制造商:AZM 制造商全稱(chēng):AZM 功能描述:PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| AZV99T | 制造商:AZM 制造商全稱(chēng):AZM 功能描述:PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
| AZV99T+ | 制造商:AZM 制造商全稱(chēng):AZM 功能描述:PECL/LVDS Oscillator Gain Stage & Buffer with Selectable Enable |
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