
AZP96
ECL/PECL Differential Receiver
1630 S. STAPLEY DR., SUITE 127
MESA, ARIZONA 85204
USA
(480) 962-5881
FAX (480) 890-2541
www.azmicrotek.com
ARIZONA MICROTEK, INC.
FEATURES
Green and RoHS Compliant / Lead (Pb)
Free Package available
250ps Propagation Delay
High Bandwidth Output Transitions
Operating Range of 3.0V to 5.5V
Minimized Input Loading
IBIS Model File Available on Arizona
Microtek Website
DESCRIPTION
The AZP96 is a differential receiver without the input clamping networks found on similar devices such as the
AZ100LVEL16. This makes it especially useful as a buffer when input loading effects must be minimized. Removal
of the input clamping network means that the output state will be undefined if both inputs are left open.
The AZP96 provides a V
BB
output for single-ended use or a DC bias reference for AC coupling to the device.
For single-ended input applications, the V
BB
reference should be connected to one side of the D/D differential input
pair. The input signal is then fed to the other D/D input. The V
BB
pin can support 1.5 mA sink/source current. When
used, the V
BB
pin should be bypassed to ground via a 0.01
μ
F capacitor.
NOTE: Specifications in the ECL/PECL/LVPECL tables are valid when thermal equilibrium is established.
PIN DESCRIPTION
FUNCTION
Data Inputs
Data Outputs
Reference Voltage Output
Positive Supply
Negative Supply
No Connect
PIN
D, D
Q, Q
V
BB
V
CC
V
EE
NC
PACKAGE AVAILABILITY
PART NUMBER
PACKAGE
MLP 8 (2x2)
Green / RoHS
Compliant / Lead
(Pb) Free
1
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts)
Tape & Reel.
2
Date code format: “Y” for year followed by “WW” for week.
MARKING
NOTES
AZP96NG
Q1G
<Date Code>
1,2
AZP96N
MLP 8, 2x2 mm
D
4
3
2
1
6
5
8
7
V
BB
Q
V
CC
NC
Q
V
EE
D
TOP VIEW
Bottom Center Pad may be left open or tied to V
EE
.