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參數(shù)資料
| 型號： | AVRPORTA |
| 廠商： | Atmel Corp. |
| 英文描述： | 8-bit Bi-directional I/O Port(8位雙向I/O端口) |
| 中文描述： | 8位雙向I / O端口（8位雙向的I / O端口） |
| 文件頁數(shù)： | 1/6頁 |
| 文件大?。?/td> | 159K |
| 代理商： | AVRPORTA |
1
Features
8-bit Bi-directional I/O Port
Individual Pull-up Resistors
Data and Low-order Address Port for External Data SRAM
Description
The AVRPORTA module is an 8-bit, general purpose I/O Port. It is also used to output
the low-order address byte and to transfer data when accessing external data
memory.
Specific Peripheral Information
The AVRPORTA peripheral is approximately 260 gates. It is designed and described
in this datasheet to perform functionally identical to PORT A in the AVR
ATmega103
datasheet (literature #0945B). Any differences will be listed in the section named
“
Modifications to Standard Product.
”
The peripheral was designed to function like the
standard product to enable smoother transition for customers who began
development and production with an AVR standard product and now wish to integrate
their design into an ASIC. If the configuration of AVRPORTA does not satisfy
customer requirements, it can be modified to different specifications.
This datasheet is described with a tri-state databus configuration, which is the same
configuration as the AVR standard products. If desired, the AVRPORTA peripheral
can be provided in a split databus configuration.
Figure 1.
Physical Connections
cp1
cp2
ireset
sre
ale
adr[5:0]
iore
iowe
dbus[7:0]
AVR
PORTA
Clock
and
Control
I/O Bus
Instruction
Bus
Port
Connections
topada[7:0]
padena[7:0]
plupba[7:0]
frompada[7:0]
xadr2ad
xadout
xreb
xadr[7:0]
ramdi[7:0]
Gate Array/
Embedded
Array
ASIC Macrocell
AVRPORTA
Preliminary
Rev. 1275A
–
07/00
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