
3
4235K–8051–05/08
AT89C51RD2/ED2
2.
Block Diagram
Figure 2-1.
Block Diagram
Timer 0
INT
RAM
256x8
T
0
T
1
R
x
D
T
x
D
WR
RD
EA
PSEN
ALE/
XTALA2
XTALA1
EUART
CPU
Timer 1
IN
T
1
Ctrl
IN
T
0
(2)
C51
CORE
(2) (2)
Port 0
P
0
Port 1Port 2 Port 3
P
1
P
2
P
3
XRAM
1792 x 8
IB-bus
PCA
R
E
S
E
T
PROG
Watch
-dog
P
C
A
E
C
I
V
S
V
C
(2)
(1)
(1): Alternate function of Port 1
(2): Alternate function of Port 3
(1)
Timer2
T
2
E
X
T
2
(1)
Flash
64K x 8
Keyboard
(1)
K
e
y
b
o
a
rd
M
IS
O
M
O
S
I
S
C
K
S
Port4
P
4
(1) (1)(1)(1)
BOOT
2K x 8
ROM
Regulator
POR / PFD
Port 5
P
5
Parallel I/O Ports &
External Bus
SPI
EEPROM*
2K x 8
(AT89C51ED2)