
MB91470/480 Series
70
(6) Normal Bus Access Read/Write Operation
(VCC
= 4.0 V to 5.5 V, VSS = AVSS10 = AVSS12 = 0.0 V, TA = 40 °C to + 85 °C)
(Continued)
Parameter
Symbol
Pin Name
Condi-
tion
Value
Unit Remarks
Min
Max
ASX setup
tASLCH
SYSCLK
ASX
3
ns
ASX hold
tCHASH
31/2
× tCYC + 10 ns
CS0X to CS2X setup
tCSLCH
SYSCLK
CS0X to CS2X
3
ns
CS0X to CS2X hold
tCHCSH
31/2
× tCYC + 10 ns
Address setup
tASCH
SYSCLK
A15 to A00
3
ns
tASRL
RDX
A15 to A00
3
ns
tASWL
WR0X, WR1X
A15 to A00
3
ns
Address hold
tCHAX
SYSCLK
A15 to A00
31/2
× tCYC + 10 ns
tRHAX
RDX
A15 to A00
3
ns
tWHAX
WR0X, WR1X
A15 to A00
3
ns
Valid address
→
Valid data input time
tAVDV
A15 to A00
D31 to D16
3/2
× tCYC 7ns
*1
*2
RDX delay time
tCHRL
SYSCLK
RDX
10
ns
tCHRH
10
ns
RDX
↓ →
Valid data input time
tRLDV
RDX
D31 to D16
tCYC
5ns *1
Data setup
→
RDX
↑ time
tDSRH
18
ns
RDX
↑ →
Data hold time
tRHDX
0
ns
RDX minimum pulse width
tRLRH
RDX
tCYC
5
ns
WR0X, WR1X delay time
tCHWL
SYSCLK
RDX
10
ns
tCHWH
10
ns
Data setup
→
WR0X, WR1X
↑ time
tDSWH
WR0X, WR1X
D31 to D16
tCYC
ns
WR0X, WR1X
↑ →
Data hold time
tWHDX
3
ns
WR0X, WR1X minimum pulse
width
tWLWH
WR0X, WR1X
tCYC
5
ns