參數(shù)資料
型號: ATTINY43U-SU
廠商: Atmel
文件頁數(shù): 73/158頁
文件大?。?/td> 0K
描述: MCU AVR 4K FLASH 8MHZ 20-SOIC
產(chǎn)品培訓模塊: ATtiny43U Overview
MCU Product Line Introduction
tinyAVR Introduction
標準包裝: 37
系列: AVR® ATtiny
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: USI
外圍設備: 欠壓檢測/復位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 16
程序存儲器容量: 4KB(2K x 16)
程序存儲器類型: 閃存
EEPROM 大小: 64 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 管件
產(chǎn)品目錄頁面: 613 (CN2011-ZH PDF)
配用: ATSTK600-TINYX3U-ND - STK600 SOCKET/ADAPTER TINYX3U
21
8048C–AVR–02/12
ATtiny43U
5.5.2
EEDR – EEPROM Data Register
Bits 7:0 – EEDR[7:0]: EEPROM Data
For the EEPROM write operation the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
5.5.3
EECR – EEPROM Control Register
Bit 7 – Res: Reserved Bit
These bits are reserved and will always read zero. For compatibility with future AVR devices,
always write this bit to zero. After reading, mask out this bit.
Bit 6 – Res: Reserved Bit
These bits are reserved and will always read zero.
Bits 5:4 – EEPM[1:0]: EEPROM Mode Bits
The EEPROM Programming mode bits setting defines which programming action that will be
triggered when writing EEPE. It is possible to program data in one atomic operation (erase the
old value and program the new value) or to split the Erase and Write operations in two different
operations. The Programming times for the different modes are shown in Table 5-1. While EEPE
is set, any write to EEPMn will be ignored. During reset, the EEPMn bits will be reset to 0b00
unless the EEPROM is busy programming.
Bit 3 – EERIE: EEPROM Ready Interrupt Enable
Writing EERIE to one enables the EEPROM Ready Interrupt if the I-bit in SREG is set. Writing
EERIE to zero disables the interrupt. The EEPROM Ready Interrupt generates a constant inter-
rupt when Non-volatile memory is ready for programming.
Bit 2 – EEMPE: EEPROM Master Program Enable
The EEMPE bit determines whether writing EEPE to one will have effect or not.
Bit
765
432
10
EEDR7
EEDR6
EEDR5
EEDR4
EEDR3
EEDR2
EEDR1
EEDR0
EEDR
Read/Write
R/W
Initial Value
0
Bit
765
432
10
EEPM1
EEPM0
EERIE
EEMPE
EEPE
EERE
EECR
Read/Write
R
R/W
Initial Value
0
X
0
X
0
Table 5-1.
EEPROM Mode Bits
EEPM1
EEPM0
Programming
Time
Operation
0
3.4 ms
Erase and Write in one operation (Atomic Operation)
0
1
1.8 ms
Erase Only
1
0
1.8 ms
Write Only
1
Reserved for future use
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