參數(shù)資料
型號： ATTINY43U-SU
廠商： Atmel
文件頁數(shù)： 141/158頁
文件大?。?/td> 0K
描述： MCU AVR 4K FLASH 8MHZ 20-SOIC
產(chǎn)品培訓模塊： ATtiny43U Overview
MCU Product Line Introduction
tinyAVR Introduction
標準包裝： 37
系列： AVR® ATtiny
核心處理器： AVR
芯體尺寸： 8-位
速度： 8MHz
連通性： USI
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 16
程序存儲器容量： 4KB（2K x 16）
程序存儲器類型： 閃存
EEPROM 大?。?/td> 64 x 8
RAM 容量： 256 x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 4x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
包裝： 管件
產(chǎn)品目錄頁面： 613 (CN2011-ZH PDF)
配用： ATSTK600-TINYX3U-ND - STK600 SOCKET/ADAPTER TINYX3U
83
8048C–AVR–02/12
ATtiny43U
Figure 12-3 on page 83 shows a block diagram of the Output Compare unit.
Figure 12-3. Output Compare Unit, Block Diagram
The OCRnx Registers are double buffered when using any of the Pulse Width Modulation
(PWM) modes. For the normal and Clear Timer on Compare (CTC) modes of operation, the dou-
ble buffering is disabled. The double buffering synchronizes the update of the OCRnx Compare
Registers to either top or bottom of the counting sequence. The synchronization prevents the
occurrence of odd-length, non-symmetrical PWM pulses, thereby making the output glitch-free.
The OCRnx Register access may seem complex, but this is not case. When the double buffering
is enabled, the CPU has access to the OCRnx Buffer Register, and if double buffering is dis-
abled the CPU will access the OCRnx directly.
12.5.1
Force Output Compare
In non-PWM waveform generation modes, the match output of the comparator can be forced by
writing a one to the Force Output Compare (nx) bit. Forcing Compare Match will not set the
OCFnx Flag or reload/clear the timer, but the OCnx pin will be updated as if a real Compare
Match had occurred (the COMnx[1:0] bits settings define whether the OCnx pin is set, cleared or
toggled).
12.5.2
Compare Match Blocking by TCNTn Write
All CPU write operations to the TCNTn Register will block any Compare Match that occur in the
next timer clock cycle, even when the timer is stopped. This feature allows OCRnx to be initial-
ized to the same value as TCNTn without triggering an interrupt when the Timer/Counter clock is
enabled.
12.5.3
Using the Output Compare Unit
Since writing TCNTn in any mode of operation will block all Compare Matches for one timer
clock cycle, there are risks involved when changing TCNTn when using the Output Compare
Unit, independently of whether the Timer/Counter is running or not. If the value written to TCNTn
OCFn x (Int.Req.)
= (8-bit Comparator )
OCRnx
OCnx
DATA BUS
TCNTn
WGMn[1:0]
Waveform Generator
top
FOCn
COMnx[1:0]
bottom
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ATTINY43U-SUR 功能描述:8位微控制器 -MCU 4KB FLSH 64B EE 256B SRAM-8MHz, IND 0.9V RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
ATTINY44 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
ATTINY44-15MZ 功能描述:8位微控制器 -MCU 4KB Flash 15MHz Auto 125-degrees C RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
ATTINY44-15SSZ 功能描述:8位微控制器 -MCU 4KB Flash 15MHz Auto 125-degrees C RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
ATTINY441-MMH 制造商:Atmel Corporation 功能描述:16MHZ, 3X3MM, 20 VQFN, IND. GRADE, GREEN - Bulk 制造商:Atmel Corporation 功能描述:IC MCU 8BIT 4KB FLASH 20VQFN
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