參數(shù)資料
型號: ATSAM3SD8CA-CU
廠商: Atmel
文件頁數(shù): 6/57頁
文件大?。?/td> 0K
描述: IC MCU 2X256KB CORTEX-M3 100-QFN
標準包裝: 260
系列: SAM3S
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 64MHz
連通性: EBI/EMI,I²C,IrDA,MMC,SPI,SSC,UART/USART,USB
外圍設備: 欠壓檢測/復位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: *
包裝: *
14
11090BS–ATARM–22-Oct-13
SAM3S8/SD8 Summary
5.
Power Considerations
5.1
Power Supplies
The SAM3S8/SD8 has several types of power supply pins:
VDDCORE pins: Power the core, the embedded memories and the peripherals. Voltage
ranges from 1.62V to 1.95V.
VDDIO pins: Power the Peripherals I/O lines (Input/Output Buffers), USB transceiver, Backup
part, 32 kHz crystal oscillator and oscillator pads. Voltage ranges from 1.62V to 3.6V.
VDDIN pin: Voltage Regulator Input, ADC, DAC and Analog Comparator Power Supply.
Voltage ranges from 1.8V to 3.6V.
VDDPLL pin: Powers the PLLA, PLLB, the Fast RC and the 3 to 20 MHz oscillator. Voltage
ranges from 1.62V to 1.95V.
5.2
Voltage Regulator
The SAM3S8/SD8 embeds a voltage regulator that is managed by the Supply Controller.
This internal regulator is designed to supply the internal core of SAM3S8/SD8. It features two
operating modes:
In Normal mode, the voltage regulator consumes less than 700 A static current and draws
80 mA of output current. Internal adaptive biasing adjusts the regulator quiescent current
depending on the required load current. In Wait Mode quiescent current is only 7 A.
In Backup mode, the voltage regulator consumes less than 1 A while its output (VDDOUT)
is driven internally to GND. The default output voltage is 1.80V and the start-up time to reach
Normal mode is less than 100 s.
For adequate input and output power supply decoupling/bypassing, refer to the “Voltage Regula-
tor” section in the “Electrical Characteristics” section of the datasheet.
5.3
Typical Powering Schematics
The SAM3S8/SD8 supports a 1.62V-3.6V single supply mode. The internal regulator input con-
nected to the source and its output feeds VDDCORE. Figure 5-1 below shows the power
schematics.
As VDDIN powers the voltage regulator, the ADC, DAC and the analog comparator, when the
user does not want to use the embedded voltage regulator, it can be disabled by software via
the SUPC (note that this is different from Backup mode).
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