參數(shù)資料
型號(hào): ATMEGA324A-AU
廠商: Atmel
文件頁數(shù): 54/160頁
文件大?。?/td> 0K
描述: IC MCU AVR 32K 20MHZ 44TQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
megaAVR Introduction
標(biāo)準(zhǔn)包裝: 160
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲(chǔ)器容量: 32KB(16K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大小: 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-TQFP
包裝: 托盤
配用: ATSTK600-RC31-ND - STK600 ROUTING CARD AVR
147
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
17.5.3
Using the Output Compare Unit
Since writing TCNT2 in any mode of operation will block all compare matches for one timer clock
cycle, there are risks involved when changing TCNT2 when using the Output Compare channel,
independently of whether the Timer/Counter is running or not. If the value written to TCNT2
equals the OCR2x value, the compare match will be missed, resulting in incorrect waveform
generation. Similarly, do not write the TCNT2 value equal to BOTTOM when the counter is
downcounting.
The setup of the OC2x should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OC2x value is to use the Force Output Com-
pare (FOC2x) strobe bit in Normal mode. The OC2x Register keeps its value even when
changing between Waveform Generation modes.
Be aware that the COM2x1:0 bits are not double buffered together with the compare value.
Changing the COM2x1:0 bits will take effect immediately.
17.6
Compare Match Output unit
The Compare Output mode (COM2x1:0) bits have two functions. The Waveform Generator uses
the COM2x1:0 bits for defining the Output Compare (OC2x) state at the next compare match.
Also, the COM2x1:0 bits control the OC2x pin output source. Figure 17-4 shows a simplified
schematic of the logic affected by the COM2x1:0 bit setting. The I/O Registers, I/O bits, and I/O
pins in the figure are shown in bold. Only the parts of the general I/O Port Control Registers
(DDR and PORT) that are affected by the COM2x1:0 bits are shown. When referring to the
OC2x state, the reference is for the internal OC2x Register, not the OC2x pin.
Figure 17-4. Compare Match Output unit, schematic.
The general I/O port function is overridden by the Output Compare (OC2x) from the Waveform
Generator if either of the COM2x1:0 bits are set. However, the OC2x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
PORT
DDR
DQ
OCnx
Pin
OCnx
DQ
Waveform
Generator
COMnx1
COMnx0
0
1
D
ATA
B
U
S
FOCnx
clk
I/O
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ATMEGA324A-CU 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz, IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATMEGA324A-CUR 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz, IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATMEGA324A-MCH 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz, IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
ATMEGA324A-MCHR 功能描述:8位微控制器 -MCU AVR 32KB FLSH 1KB EE 2KB SRAM-20MHz, IND RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT