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參數(shù)資料
| 型號： | ATF1508RE-7AU100 |
| 廠商： | Atmel |
| 文件頁數(shù)： | 35/54頁 |
| 文件大小： | 0K |
| 描述： | IC CPLD EE 128MC 5NS 100-TQFP |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 系列： | ATF15xx |
| 可編程類型： | 系統(tǒng)內(nèi)可編程（最少 10,000 次編程/擦除循環(huán)） |
| 最大延遲時間 tpd(1)： | 7.5ns |
| 電壓電源 - 內(nèi)部： | 3 V ~ 3.6 V |
| 宏單元數(shù)： | 128 |
| 輸入/輸出數(shù)： | 80 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-TQFP |
| 供應(yīng)商設(shè)備封裝： | 100-TQFP（14x14） |
| 包裝： | 托盤 |
| 產(chǎn)品目錄頁面： | 608 (CN2011-ZH PDF) |
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JTAG ISP Guidelines
Atmel ATF15xx Family: ISP Devices User Guide
6-3
12. During ISP programming, all I/O pins are in one of the following conditions:
High-impedance state:
–
When a blank/erased device is programmed
–
When a device is reprogrammed with the pin-keeper circuits disabled
–
Prevents bus contention with external devices interfacing with Atmel device
on the circuit board
Weakly latched to the previous state:
–
When a programmed device is reprogrammed with the pin-keeper circuits
enabled
–
I/O pins keep previous logic levels, prior to ISP
–
Prevents ISP from affecting the operation of other devices on the system
board
13. Don’t use multiple JTAG chains on one board.
Devices may interact between different JTAG chains.
Board is functional only when all devices in all JTAG chains are programmed
successfully.
If programming fails for at least one device in a chain while other JTAG chains
were successfully programmed:
–
Either Atmel or other devices on board can be damaged.
Possible bus contention problem for tri-stateable outputs
–
System board operational state is undefined.
Incorrect functional operation may occur
Solution: Use one JTAG chain to link all devices on the board.
14. Avoid long (+5 devices) JTAG devices chains.
If you must generate a long chain, buffer the TMS, TCK signal between devices.
–
Schmitt trigger buffers preferred
Buffers reshape rise times on TMS and TCK signals.
15. Buffer all JTAG pins directly at the header.
Alternate approach to handling long JTAG chains
Assures clean rising edges on all JTAG signals
16. Use a slower TCK frequency.
TCK skew may cause setup/hold violations on long device chains for faster
clock frequencies.
Slower frequency signals are less subject to transmission line effects (ringing,
overshoot), which can cause programming problems.
Slower signal frequency generates less noise/crosstalk on cable.
17. Terminate JTAG signals at header.
Both active and passive termination are acceptable. However, passive termina-
tion is preferred.
Reduces ringing due to long cable/PCB trace lengths.
Termination is most critical for TMS and TCK.
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