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參數(shù)資料
| 型號(hào)： | AT91SAM7XC256-CU-999 |
| 廠商： | Atmel |
| 文件頁數(shù)： | 30/47頁 |
| 文件大小： | 0K |
| 描述： | IC MCU ARM7 256KB FLASH 100TFBGA |
| 產(chǎn)品培訓(xùn)模塊： | SAM9 MPU Boot Solutions & Application Deployment AT91SAM7X and SAM7XC Flash-based Microcontrollers MCU Product Line Introduction |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 系列： | SAM7XC |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 55MHz |
| 連通性： | CAN，以太網(wǎng)，I²C，SPI，SSC，UART/USART，USB |
| 外圍設(shè)備： | 欠壓檢測(cè)/復(fù)位，DMA，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 62 |
| 程序存儲(chǔ)器容量： | 256KB（256K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 64K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 1.65 V ~ 1.95 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 100-TFBGA |
| 包裝： | 帶卷 (TR) |
| 配用： | AT91SAM-ICE-ND - EMULATOR FOR AT91 ARM7/ARM9 AT91SAM7XC-EK-ND - KIT EVAL FOR AT91SAM7XC256/128 |
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36
6209DS–ATARM–17-Feb-09
AT91SAM7XC512/256/128
10.6
Ethernet MAC
DMA Master on Receive and Transmit Channels
Compatible with IEEE Standard 802.3
10 and 100 Mbit/s operation
Full- and half-duplex operation
Statistics Counter Registers
MII/RMII interface to the physical layer
Interrupt generation to signal receive and transmit completion
28-byte transmit FIFO and 28-byte receive FIFO
Automatic pad and CRC generation on transmitted frames
Automatic discard of frames received with errors
Address checking logic supports up to four specific 48-bit addresses
Support Promiscuous Mode where all valid received frames are copied to memory
Hash matching of unicast and multicast destination addresses
Physical layer management through MDIO interface
Half-duplex flow control by forcing collisions on incoming frames
Full-duplex flow control with recognition of incoming pause frames
Support for 802.1Q VLAN tagging with recognition of incoming VLAN and priority tagged
frames
Multiple buffers per receive and transmit frame
Jumbo frames up to 10240 bytes supported
10.7
Serial Peripheral Interface
Supports communication with external serial devices
– Four chip selects with external decoder allow communication with up to 15
peripherals
– Serial memories, such as DataFlash and 3-wire EEPROMs
– Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
Sensors
– External co-processors
Master or slave serial peripheral bus interface
– 8- to 16-bit programmable data length per chip select
– Programmable phase and polarity per chip select
– Programmable transfer delays per chip select, between consecutive transfers and
between clock and data
– Programmable delay between consecutive transfers
– Selectable mode fault detection
– Maximum frequency at up to Master Clock
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