參數(shù)資料
型號: AT90USB82-16MU
廠商: Atmel
文件頁數(shù): 11/38頁
文件大?。?/td> 0K
描述: IC AVR MCU 8K FLASH 32QFN
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
megaAVR Introduction
標(biāo)準(zhǔn)包裝: 2,450
系列: AVR® 90USB
核心處理器: AVR
芯體尺寸: 8-位
速度: 16MHz
連通性: EBI/EMI,PS/2,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 22
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 512 x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 32-VFQFN 裸露焊盤
包裝: 托盤
產(chǎn)品目錄頁面: 611 (CN2011-ZH PDF)
配用: ATSTK600-TQFP32-ND - STK600 SOCKET/ADAPTER 32-TQFP
ATSTK526-ND - KIT STARTER FOR AT90USB82/162
ATAVRDRAGON-ND - KIT DRAGON FLASH MEM AVR
ATSTK525-ND - KIT STARTER FOR AT90USB
AT90USBKEY2-ND - KIT DEMO FOR AT90USB
19
7707F–AVR–11/10
AT90USB82/162
For a detailed description of SPI, debugWIRE and Parallel data downloading to the EEPROM,
see page 257, page 241, and page 246 respectively.
5.3.1
EEPROM Read/Write Access
The EEPROM Access Registers are accessible in the I/O space.
The write access time for the EEPROM is given in Table 5-2. A self-timing function, however,
lets the user software detect when the next byte can be written. If the user code contains instruc-
tions that write the EEPROM, some precautions must be taken. In heavily filtered power
supplies, V
CC is likely to rise or fall slowly on power-up/down. This causes the device for some
period of time to run at a voltage lower than specified as minimum for the clock frequency used.
See “Preventing EEPROM Corruption” on page 23. for details on how to avoid problems in these
situations.
In order to prevent unintentional EEPROM writes, a specific write procedure must be followed.
Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is read, the CPU is halted for four clock cycles before the next instruction is
executed. When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
5.3.2
The EEPROM Address Register – EEARH and EEARL
Bits 15..12 – Res: Reserved Bits
These bits are reserved bits in the AT90USB82/162 and will always read as zero.
Bits 11..0 – EEAR8..0: EEPROM Address
The EEPROM Address Registers – EEARH and EEARL specify the EEPROM address in the
512 bytes EEPROM space. The EEPROM data bytes are addressed linearly between 0 and
512. The initial value of EEAR is undefined. A proper value must be written before the EEPROM
may be accessed.
5.3.3
The EEPROM Data Register – EEDR
Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to the
EEPROM in the address given by the EEAR Register. For the EEPROM read operation, the
EEDR contains the data read out from the EEPROM at the address given by EEAR.
Bit
151413
1211
10
9
8
EEAR11
EEAR10
EEAR9
EEAR8
EEARH
EEAR7
EEAR6
EEAR5
EEAR4
EEAR3
EEAR2
EEAR1
EEAR0
EEARL
76
54
3
2
1
0
Read/Write
R
R/W
Initial Value
0
X
XX
X
Bit
765432
1
0
MSB
LSB
EEDR
Read/Write
R/W
Initial Value
000000
0
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