參數(shù)資料
型號(hào)： AT90S8535-8PI
廠(chǎng)商： Atmel
文件頁(yè)數(shù)： 17/127頁(yè)
文件大?。?/td> 0K
描述： IC MCU 8K FLSH 8MHZ A/D IT 40DIP
標(biāo)準(zhǔn)包裝： 18
系列： AVR® 90S
核心處理器： AVR
芯體尺寸： 8-位
速度： 8MHz
連通性： SPI，UART/USART
外圍設(shè)備： 欠壓檢測(cè)/復(fù)位，POR，PWM，WDT
輸入/輸出數(shù)： 32
程序存儲(chǔ)器容量： 8KB（4K x 16）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大小： 512 x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 4 V ~ 6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
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1997 Microchip Technology Inc.
DS30272A-page 113
PIC16C71X
Applicable Devices
710 71 711 715
13.1
DC Characteristics:
PIC16C715-04 (Commercial, Industrial, Extended)
PIC16C715-10 (Commercial, Industrial, Extended)
PIC16C715-20 (Commercial, Industrial, Extended))
DC CHARACTERISTICS
Standard Operating Conditions (unless otherwise stated)
Operating temperature
0C
≤ TA ≤ +70C (commercial)
-40C
≤ TA ≤ +85C (industrial)
-40C
≤ TA ≤ +125C (extended)
Param.
No.
Characteristic
Sym
Min Typ Max Units
Conditions
D001
D001A
Supply Voltage
VDD
4.0
4.5
-
5.5
V
XT, RC and LP osc conguration
HS osc conguration
D002*
RAM Data Retention
Voltage (Note 1)
VDR
-
1.5
-
V
Device in SLEEP mode
D003
VDD start voltage to
ensure internal Power-
on Reset signal
VPOR
-
VSS
-
V
See section on Power-on Reset for details
D004*
VDD rise rate to ensure
internal Power-on Reset
signal
SVDD
0.05
-
V/ms See section on Power-on Reset for details
D005
Brown-out Reset Voltage
BVDD
3.7
4.0
4.3
V
BODEN conguration bit is enabled
D010
D013
Supply Current (Note 2)
IDD
-
2.7
13.5
5
30
mA
XT, RC osc conguration (PIC16C715-04)
FOSC = 4 MHz, VDD = 5.5V (Note 4)
HS osc conguration (PIC16C715-20)
FOSC = 20 MHz, VDD = 5.5V
D015
Brown-out Reset Current
(Note 5)
IBOR
-
300*
500
A
BOR enabled VDD = 5.0V
D020
D021
D021A
D021B
Power-down Current
(Note 3)
IPD
-
10.5
1.5
42
21
24
30
A
VDD = 4.0V, WDT enabled, -40
°C to +85°C
VDD = 4.0V, WDT disabled, -0
°C to +70°C
VDD = 4.0V, WDT disabled, -40
°C to +85°C
VDD = 4.0V, WDT disabled, -40
°C to +125°C
D023
Brown-out Reset Current
(Note 5)
IBOR
-
300*
500
A
BOR enabled VDD = 5.0V
*
These parameters are characterized but not tested.
Data in "Typ" column is at 5V, 25C unless otherwise stated. These parameters are for design guidance only
and are not tested.
Note 1: This is the limit to which VDD can be lowered in SLEEP mode without losing RAM data.
2: The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin
loading and switching rate, oscillator type, internal code execution pattern, and temperature also have an
impact on the current consumption.
The test conditions for all IDD measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tristated, pulled to VDD
MCLR = VDD; WDT enabled/disabled as specied.
3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is
measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS.
4: For RC osc conguration, current through Rext is not included. The current through the resistor can be
estimated by the formula Ir = VDD/2Rext (mA) with Rext in kOhm.
5: The
current is the additional current consumed when this peripheral is enabled. This current should be
added to the base IDD or IPD measurement.
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