參數(shù)資料
型號: AT89S52-24JI
廠商: Atmel
文件頁數(shù): 20/37頁
文件大?。?/td> 0K
描述: IC MCU 8K FLASH 24MHZ 44-PLCC
標(biāo)準(zhǔn)包裝: 27
系列: 89S
核心處理器: 8051
芯體尺寸: 8-位
速度: 24MHz
連通性: UART/USART
外圍設(shè)備: WDT
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-LCC(J 形引線)
包裝: 管件
27
1919D–MICRO–6/08
AT89S52
Note:
1. B1 = 0, B2 = 0 ---> Mode 1, no lock protection
B1 = 0, B2 = 1 ---> Mode 2, lock bit 1 activated
B1 = 1, B2 = 0 ---> Mode 3, lock bit 2 activated
B1 = 1, B2 = 1 ---> Mode 4, lock bit 3 activated
After Reset signal is high, SCK should be low for at least 64 system clocks before it goes high to
clock in the enable data bytes. No pulsing of Reset signal is necessary. SCK should be no faster
than 1/16 of the system clock at XTAL1.
For Page Read/Write, the data always starts from byte 0 to 255. After the command byte and
upper address byte are latched, each byte thereafter is treated as data until all 256 bytes are
shifted in/out. Then the next instruction will be ready to be decoded.
Table 24-1.
Serial Programming Instruction Set
Instruction
Format
Operation
Byte 1Byte 2Byte 3Byte 4
Programming Enable
1010 1100
0101 0011
xxxx xxxx
0110 1001
(Output on
MISO)
Enable Serial Programming
while RST is high
Chip Erase
1010 1100
100x xxxx
xxxx xxxx
Chip Erase Flash memory
array
Read Program Memory
(Byte Mode)
0010 0000
xxx
Read data from Program
memory in the byte mode
Write Program Memory
(Byte Mode)
0100 0000
xxx
Write data to Program
memory in the byte mode
Write Lock Bits(1)
1010 1100
1110 00
xxxx xxxx
Write Lock bits. See Note (1).
Read Lock Bits
0010 0100
xxxx xxxx
xxx
xx
Read back current status of
the lock bits (a programmed
lock bit reads back as a “1”)
Read Signature Bytes
0010 1000
xxx
xxx xxx0
Signature Byte
Read Signature Byte
Read Program Memory
(Page Mode)
0011 0000
xxx
Byte 0
Byte 1...
Byte 255
Read data from Program
memory in the Page Mode
(256 bytes)
Write Program Memory
(Page Mode)
0101 0000
xxx
Byte 0
Byte 1...
Byte 255
Write data to Program
memory in the Page Mode
(256 bytes)
D7 D6 D5 D4
D3 D2 D1 D0
A7 A6 A5 A4
A3 A2 A1 A0
A1
2
A1
1
A10
A9 A8
B2
B1
A1
2
A1
1
A10
A9 A8
A7 A6 A5 A4
A3 A2 A1 A0
D7 D6 D5 D4
D3 D2 D1 D0
LB3
LB2 LB1
A12
A11 A10
A9 A8
A1
2
A11 A10
A9 A8
} Eachofthelockbitmodesneedstobeactivatedsequentially
before Mode 4 can be executed.
A12
A11 A10
A9 A8
A7
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