參數資料
型號: AT89C51RB2-3CSUM
廠商: Atmel
文件頁數: 65/127頁
文件大?。?/td> 0K
描述: IC 8051 MCU 16K FLASH 40-DIP
產品培訓模塊: MCU Product Line Introduction
標準包裝: 216
系列: 89C
核心處理器: 8051
芯體尺寸: 8-位
速度: 60MHz
連通性: SPI,UART/USART
外圍設備: POR,PWM,WDT
輸入/輸出數: 32
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
配用: AT89OCD-01-ND - USB EMULATOR FOR AT8XC51 MCU
AT89STK-11-ND - KIT STARTER FOR AT89C51RX2
42
AT89C51RB2/RC2
4180E–8051–10/06
Pulse Width Modulator
Mode
All of the PCA Modules can be used as PWM outputs. Figure 16 shows the PWM func-
tion. The frequency of the output depends on the source for the PCA timer. All of the
Modules will have the same frequency of output because they all share the PCA timer.
The duty cycle of each Module is independently variable using the module's capture
register CCAPLn. When the value of the PCA CL SFR is less than the value in the mod-
ule's CCAPLn SFR the output will be low, when it is equal to or greater than the output
will be high. When CL overflows from FF to 00, CCAPLn is reloaded with the value in
CCAPHn. This allows updating the PWM without glitches. The PWM and ECOM bits in
the module's CCAPMn register must be set to enable the PWM mode.
Figure 16. PCA PWM Mode
PCA Watchdog Timer
An on-board watchdog timer is available with the PCA to improve the reliability of the
system without increasing chip count. Watchdog timers are useful for systems that are
susceptible to noise, power glitches, or electrostatic discharge. Module 4 is the only
PCA Module that can be programmed as a watchdog. However, this Module can still be
used for other modes if the watchdog is not needed. Figure 14 shows a diagram of how
the watchdog works. The user pre-loads a 16-bit value in the compare registers. Just
like the other compare modes, this 16-bit value is compared to the PCA timer value. If a
match is allowed to occur, an internal reset will be generated. This will not cause the
RST pin to be driven high.
In order to hold off the reset, the user has the following three options:
1.
Periodically change the compare value so it will never match the PCA timer.
2.
Periodically change the PCA timer value so it will never match the compare
values.
3.
Disable the watchdog by clearing the WDTE bit before a match occurs and then
re-enable it.
The first two options are more reliable because the watchdog timer is never disabled as
in option #3. If the program counter ever goes astray, a match will eventually occur and
cause an internal reset. The second option is also not recommended if other PCA Mod-
ules are being used. Remember, the PCA timer is the time base for all modules;
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n = 0 to 4
0xDA to 0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
8-bit Comparator
CEXn
“0”
“1”
Enable
PCA Counter/Timer
Overflow
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