31
AT89C51RB2/RC2
4180E–8051–10/06
Programmable
Counter Array (PCA)
The PCA provides more timing capabilities with less CPU intervention than the standard
timer/counters. Its advantages include reduced software overhead and improved accu-
racy. The PCA consists of a dedicated timer/counter which serves as the time base for
an array of five compare/capture Modules. Its clock input can be programmed to count
any one of the following signals:
Peripheral clock frequency (F
CLK PERIPH)
÷ 6
Peripheral clock frequency (FCLK PERIPH)
÷ 2
Timer 0 overflow
External input on ECI (P1.2)
Each compare/capture Modules can be programmed in any one of the following modes:
Rising and/or falling edge capture
Software timer
High-speed output
Pulse width modulator
When the compare/capture Modules are programmed in the capture mode, software
timer, or high speed output mode, an interrupt can be generated when the Module exe-
cutes its function. All five Modules plus the PCA timer overflow share one interrupt
vector.
The PCA timer/counter and compare/capture modules share Port 1 for external I/O.
These pins are listed below. If one or several bits in the port are not used for the PCA,
they can still be used for standard I/O.
The PCA timer is a common time base for all five Modules (see
Figure 11). The timer
count source is determined from the CPS1 and CPS0 bits in the CMOD register
1/6 the
peripheral clock frequency (F
CLK PERIPH)
1/2 the
peripheral clock frequency (FCLK PERIPH)
The Timer 0 overflow
The input on the ECI pin (P1.2)
PCA Component
External I/O Pin
16-bit Counter
P1.2/ECI
16-bit Module 0
P1.3/CEX0
16-bit Module 1
P1.4/CEX1
16-bit Module 2
P1.5/CEX2
16-bit Module 3
P1.6/CEX3
