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參數(shù)資料
| 型號(hào)： | AT88RF256-12 |
| 廠商： | Atmel Corp. |
| 英文描述： | 125 kHz RFID Chip for Cards and Tags |
| 中文描述： | 125千赫RFID芯片的卡和標(biāo)簽 |
| 文件頁(yè)數(shù)： | 2/12頁(yè) |
| 文件大?。?/td> | 190K |
| 代理商： | AT88RF256-12 |
AT88RF256-12
2
Since the chip includes an internal tuning capacitor, only
the addition of an external coil antenna is required to form
the complete tag or card. The chip includes an array of
read/write EEPROM, of which 224 bits are available for
user defined purposes. All necessary power generation,
regulation and data modulation/demodulation circuitry is on
the chip. The communication details are programmable.
Chip Operation
Upon power-up the chip will sequence repeatedly through
the following frame, which includes an ID transmission and
possible reception of a command. A frame is defined as the
following sequence:
1.
An optional start bit
2.
Between 32 and 152 bits from the EEPROM, which
are defined as the ID field
3.
An optional stop bit
4.
An 8-bit listening window, during which commands
may be sent to the chip
All bits are sent to or read from the chip most significant bit
first, in a manner consistent with standard serial
EEPROMs. Bit fields listed in this document are
correspondingly listed with the MSB on the left and the LSB
on the right.
Multi-byte information sent to the chip is sent most
significant byte first, following typical conventions, and 32-
bit blocks are listed in this document with the most
significant byte on the left.
Information is read from the EEPROM and transmitted by
the chip in exactly the same order in which it was written:
the first bit written is the first bit read.
Start/Stop Bits
The chip supports an optional start and stop bit (either 0
or 1) that precede and follow the ID data stream, respec-
tively. The START_STOP bit in the configuration page
turns this feature on or off. If start and stop bits are enabled
for the power-up sequence, the same ones will also appear
before and after data words read from the chip as a result
of command execution. These bits are the inverse of each
other. If a one is selected for the stop (using the STOP_1
bit), the start bit is always a zero. These start and stop bits
(if enabled) use the same encoding and modulation
scheme as the rest of the user data.
ID Field
The ID sent by the chip can be between 32 and 152 bits in
length (in multiples of 8 bits) depending on the value of the
PU_LEN field in the configuration page. EEPROM bytes
not utilized for ID storage may be used by the system for
any other purpose.
When the die are tested at Atmel, a unique 32-bit serial
number is programmed into both pages 0 and 7 of the
EEPROM. The value is locked into page 7 only and that
page can never be written by any application. Atmel
ensures that each AT88RF256 die shipped will have a
different serial number and the actual value stored in this
page cannot be controlled.
In many applications, the card or tag manufacturer may
choose to overwrite the serial number stored as an ID in
page 0 with a specific ID value of their choosing. If so
desired, the final ID value can then be locked to prevent
further changes. If the ID is not locked, or if additional
validation of the ID is required, the manufacturer may
choose to hash or encrypt the ID, serial number and
another fixed secret. The result can be stored as part of the
ID or in one of the unused pages. On presentation of the
card, reading of this validation entry and the serial number
will permit validation of the ID number.
Listening Window
After the power-up sequence of bits is transmitted, there is
a listening window during which the tag looks for modula-
tion that would initiate the transmission of a command from
the reader/writer to the tag. Commands sent at any other
time are ignored.
The first bit of all commands is a Manchester 0, which is
defined as modulation on the first half-bit time and no mod-
ulation on the second half-bit time. The leading modulation
edge of the command must start within transmit bit times 1,
2, 3, 4, 5 or 6 (starting with 0) of the listening window. The
first and last bit time of the 8-bit listening window are
ignored to prevent the chip receiver from seeing its own
modulation.
Parity
The chip requires a single, even-parity bit to be sent after
the 6 command bits and 32 bits of data on all commands
that receive data. Parity will be computed internally on the
data transmitted to the chip, and if the internally generated
parity value does not agree with the transmitted value, the
command is aborted and the chip returns to the power-up
ID read sequence. Internally, parity is computed in such a
way that the number of 1s in the 39-bit stream is even.
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| AT88SC0104C-MJ | Circular Connector; Body Material:Aluminum; Series:PT02; Number of Contacts:5; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle; Circular Contact Gender:Pin; Insert Arrangement:18-5 |
| AT88SC0104C-MP | PT02A SERIES (MS3112) GENERAL DUTY BOX MOUNT RECEPTACLES, STRAIGHT BODY STYLE, SOLDER TERMINATION, 20 SHELL SIZE, 20-16 INSERT ARRANGEMENT, RECEPTACLE GENDER, 16 CONTACTS |
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