Figure 14-5. Clock Signal Waveform for ICC Tests in Ac" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� AT80C31X2-3CSUM
寤犲晢锛� Atmel
鏂囦欢闋佹暩(sh霉)锛� 24/42闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC 8031 MCU ROMLESS 40DIP
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 216
绯诲垪锛� 80C
鏍稿績铏曠悊鍣細 8051
鑺珨灏哄锛� 8-浣�
閫熷害锛� 40/20MHz
閫i€氭€э細 UART/USART
澶栧湇瑷�(sh猫)鍌欙細 POR
杓稿叆/杓稿嚭鏁�(sh霉)锛� 32
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 ROMless
RAM 瀹归噺锛� 128 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.5 V ~ 5.5 V
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 40-DIP锛�0.600"锛�15.24mm锛�
鍖呰锛� 绠′欢
30
4428E鈥�8051鈥�02/08
AT/TS80C31X2
Figure 14-5. Clock Signal Waveform for ICC Tests in Active and Idle Modes
14.5
AC Parameters
14.5.1
Explanation of the AC Symbols
Each timing symbol has 5 characters. The first character is always a 鈥淭鈥� (stands for time). The
other characters, depending on their positions, stand for the name of a signal or the logical sta-
tus of that signal. The following is a list of all the characters and what they stand for.
Example:TAVLL = Time for Address Valid to ALE Low.
TLLPL = Time for ALE Low to PSEN Low.
TA = 0 to +70掳C (commercial temperature range); VSS = 0 V; VCC = 5 V 卤 10%; -M and -V ranges.
TA = -40掳C to +85掳C (industrial temperature range); VSS = 0 V; VCC = 5 V 卤 10%; -M and -V
ranges.
TA = 0 to +70掳C (commercial temperature range); VSS = 0 V; 2.7 V < VCC < 5.5 V; -L range.
TA = -40掳C to +85掳C (industrial temperature range); VSS = 0 V; 2.7 V < VCC < 5.5 V; -L range.
Table 14-3. gives the maximum applicable load capacitance for Port 0, Port 1, 2 and 3, and ALE
and PSEN signals. Timings will be guaranteed if these capacitances are respected. Higher
capacitance values can be used, but timings will then be degraded.
Table 14-3.
Load Capacitance versus speed range, in pF
Table 8-5., Table 8-8. and Table 8-11. give the description of each AC symbols.
Table 14-6., Table 14-9. and Table 14-12. give for each range the AC parameter.
V
CC-0.5V
0.45V
0.7V
CC
0.2V
CC-0.1
T
CLCH
T
CHCL
TCLCH = TCHCL = 5ns.
-M
-V
-L
Port 0
100
50
100
Port 1, 2, 3
80
50
80
ALE / PSEN
100
30
100
鐩搁棞(gu膩n)PDF璩囨枡
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