參數(shù)資料
型號: AT32UC3A3256-CTUT
廠商: Atmel
文件頁數(shù): 79/94頁
文件大?。?/td> 0K
描述: IC MCU AVR32 256KB FLASH 144TBGA
產(chǎn)品培訓(xùn)模塊: AVR UC3 Audio Application
MCU Product Line Introduction
AVR EVK1105 Digital Audio Gateway Kit
AVR® UC3 Introduction
標準包裝: 840
系列: AVR®32 UC3 A3
核心處理器: AVR
芯體尺寸: 32-位
速度: 66MHz
連通性: EBI/EMI,I²C,IrDA,MMC,SPI,SSC,UART/USART,USB OTG
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,WDT
輸入/輸出數(shù): 110
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-TFBGA
包裝: 托盤
產(chǎn)品目錄頁面: 615 (CN2011-ZH PDF)
配用: ATEVK1104-ND - KIT DEV/EVAL FOR AVR32 AT32UC3A
ATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMR
ATEVK1100-ND - KIT DEV/EVAL FOR AVR32 AT32UC3A
80
32072SH–AVR32–10/2012
AT32UC3A3
Fix/Workaround
For higher polling time, the software must freeze the pipe for the desired period in order to
prevent any "extra" token.
10.2.5
ADC
Sleep Mode activation needs additional A to D conversion
If the ADC sleep mode is activated when the ADC is idle the ADC will not enter sleep mode
before after the next AD conversion.
Fix/Workaround
Activate the sleep mode in the mode register and then perform an AD conversion.
10.2.6
USART
ISO7816 info register US_NER cannot be read
The NER register always returns zero.
Fix/Workaround
None.
The LIN ID is not transmitted in mode PDCM='0'
Fix/Workaround
Using USART in mode LIN master with the PDCM bit = '0', the LINID written at the first
address of the transmit buffer is not used. The LINID must be written in the LINIR register,
after the configuration and start of the PDCA transfer. Writing the LINID in the LINIR register
will start the transfer whenever the PDCA transfer is ready.
The LINID interrupt is only available for the header reception and not available for the
header transmission
Fix/Workaround
None.
USART LIN mode is not functional with the PDCA if PDCM bit in LINMR register is set
to 1
If a PDCA transfer is initiated in USART LIN mode with PDCM bit set to 1, the transfer never
starts.
Fix/Workaround
Only use PDCM=0 configuration with the PDCA transfer.
The RTS output does not function correctly in hardware handshaking mode
The RTS signal is not generated properly when the USART receives data in hardware hand-
shaking mode. When the Peripheral DMA receive buffer becomes full, the RTS output
should go high, but it will stay low.
Fix/Workaround
Do not use the hardware handshaking mode of the USART. If it is necessary to drive the
RTS output high when the Peripheral DMA receive buffer becomes full, use the normal
mode of the USART. Configure the Peripheral DMA Controller to signal an interrupt when
the receive buffer is full. In the interrupt handler code, write a one to the RTSDIS bit in the
USART Control Register (CR). This will drive the RTS output high. After the next DMA trans-
fer is started and a receive buffer is available, write a one to the RTSEN bit in the USART
CR so that RTS will be driven low.
ISO7816 Mode T1: RX impossible after any TX
RX impossible after any TX.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT32UC3A3256-CTUT SL383 制造商:Atmel Corporation 功能描述:
AT32UC3A3256-DDW 功能描述:32位微控制器 - MCU UC3A3 256Kb flash - 256Kflash UC3A - Wafer RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
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