
dsPIC30F2010
DS70118J-page 50
2011 Microchip Technology Inc.
7.2
Erasing Data EEPROM
7.2.1
ERASING A BLOCK OF DATA
EEPROM
In order to erase a block of data EEPROM, the
NVMADRU and NVMADR registers must initially
point to the block of memory to be erased. Configure
NVMCON for erasing a block of data EEPROM, and
set the WR and WREN bits in NVMCON register.
Setting the WR bit initiates the erase, as shown in
EXAMPLE 7-2:
DATA EEPROM BLOCK ERASE
7.2.2
ERASING A WORD OF DATA
EEPROM
The NVMADRU and NVMADR registers must point
to the block. Select erase a block of data Flash,
and set the WR and WREN bits in NVMCON
register. Setting the WR bit initiates the erase, as
EXAMPLE 7-3:
DATA EEPROM WORD ERASE
; Select data EEPROM block, ERASE, WREN bits
MOV
#4045,W0
MOV
W0,NVMCON
; Initialize NVMCON SFR
; Start erase cycle by setting WR after writing key sequence
DISI
#5
; Block all interrupts with priority <7
; for next 5 instructions
MOV
#0x55,W0
;
MOV
W0,NVMKEY
; Write the 0x55 key
MOV
#0xAA,W1
;
MOV
W1,NVMKEY
; Write the 0xAA key
BSET
NVMCON,#WR
; Initiate erase sequence
NOP
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete
; Select data EEPROM word, ERASE, WREN bits
MOV
#4044,W0
MOV
W0,NVMCON
; Start erase cycle by setting WR after writing key sequence
DISI
#5
; Block all interrupts with priority <7
; for next 5 instructions
MOV
#0x55,W0
;
MOV
W0,NVMKEY
; Write the 0x55 key
MOV
#0xAA,W1
;
MOV
W1,NVMKEY
; Write the 0xAA key
BSET
NVMCON,#WR
; Initiate erase sequence
NOP
; Erase cycle will complete in 2mS. CPU is not stalled for the Data Erase Cycle
; User can poll WR bit, use NVMIF or Timer IRQ to determine erasure complete