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參數(shù)資料
| 型號(hào)： | AS8501-ASOU |
| 廠商： | ams |
| 文件頁數(shù)： | 34/41頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DATA ACQ 16-SOIC |
| 特色產(chǎn)品： | AS8501 High Precision Data Acquisition Ics |
| 標(biāo)準(zhǔn)包裝： | 46 |
| 類型： | 數(shù)據(jù)采集系統(tǒng)（DAS） |
| 輸入類型： | 模擬，數(shù)字 |
| 輸出類型： | 模擬，數(shù)字 |
| 接口： | 串行 |
| 電流 - 電源： | 5mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 803 (CN2011-ZH PDF) |
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AS8501 - Data Sheet
austriamicrosystems
Revision 1.1, 04-April-06
www.austriamicrosystems.com
Page 3 of 40
4
PIN function description for SOIC 16 package
PIN
Name
description
Comment
1
RSHL
anlalog input from shunt resistor low side
analog common for VBAT, ETS and ETR; return for internal
current source
2
RSHH
anlalog input from shunt resistor high side
3
ETS
analog input with reference to RSHL
analog input for differential input ETS-VBAT
analog output for current-source
4
VBAT
analog input with reference to RSHL
analog input for differential input ETS-VBAT
analog output for current-source
5
VSS
0V-power supply for analog part
6
EZPRG
digital power input for programming Zener fuses.
This input must be open or connected to VDDD. It is not intended,
that OTP content is modified by the user.
7
VSSD
0V-power supply and ground reference point for digital part
8
CLK
digital input for external clock, master clock input
external clock typical 8.192 MHz; during MWU-mode external
connection must be high impedance or connected to VDDD to
reduce current consumption
9
SCLK
serial port clock input for SDI-port
the user must provide a serial clock on this input
10
SDAT
serial data in- and output
11
INTN
Digital I/O for interrupt from comparator
signal wake-up to external C
conversion ready flag for external interupt and synchronisation in normal mode
12
VDDD
+ 5V digital power supply
13
VDDA
+ 5V analog power supply
14
REF
reference input/output
must be connected to VSS with a 30 nF capacitor
15
AGND
analog ground, ground reference for ADC
this PIN must be connected with a 50-100nF-capacitor to VSS;
no direct connection to VSSD/VSS allowed
16
ETR
analog input with reference to RSHL
analog output for current-source
Table 1: Pin Description
Figure 2: Schematic Package outline SOIC 16
ams
AG
Technical
content
still
valid
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