- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379673 > ARM720T (Electronic Theatre Controls, Inc.) General-purpose 32-bit Microprocessor with 8KB cache, enlarged Write buffer, and Memory Management Unit (MMU) combined in a single chip PDF資料下載
參數(shù)資料
| 型號(hào)： | ARM720T |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | General-purpose 32-bit Microprocessor with 8KB cache, enlarged Write buffer, and Memory Management Unit (MMU) combined in a single chip |
| 中文描述： | 通用32位微處理器與8KB的高速緩存，擴(kuò)大寫(xiě)入緩沖區(qū)和內(nèi)存管理單元（MMU）在單一芯片上結(jié)合 |
| 文件頁(yè)數(shù)： | 137/242頁(yè) |
| 文件大?。?/td> | 831K |
| 代理商： | ARM720T |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)當(dāng)前第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)第238頁(yè)第239頁(yè)第240頁(yè)第241頁(yè)第242頁(yè)
Debug Interface
ARM DDI 0192A
Copyright ARM Limited 1997, 1998, 2000. All rights reserved.
7-27
All these instructions are said to execute at
debug speed
. Debug speed is much slower
than system speed because between each core clock, 33 scan clocks occur to shift in an
instruction, or shift out data. Executing instructions more slowly than usual is
acceptable for accessing the core state because ARM7TDM is fully static. However,
this same method cannot be used for determining the state of the rest of the system.
7.9.3
Determining system state
To meet the dynamic timing requirements of the memory system, any attempt to access
system state must occur synchronously with it. Therefore, ARM7TDM must be forced
to synchronize back to system speed. This is controlled by the 33rd bit of scan chain 1.
You can place any instruction in scan chain 1 with bit 33, the BREAKPT bit, LOW.
This instruction is then executed at debug speed. To execute an instruction at system
speed, the instruction prior to it must be scanned into scan chain 1 with bit 33 set HIGH.
After the system speed instruction has been scanned into the data bus and clocked into
the pipeline, the BYPASS instruction must be loaded into the TAP controller. This
makes the ARM7TDM automatically synchronize back to
MCLK,
the system clock,
executes the instruction at system speed, and then re-enters debug state and switches
itself back to the internally generated
DCLK
. When the instruction has completed,
DBGACK
is HIGH and the core switches back to
DCLK
. At this point, INTEST can
be selected in the TAP controller, and debugging can resume.
To determine that a system speed instruction has completed, the debugger must look at
both
DBGACK
and
nMREQ
. In order to access memory, ARM7TDM drives
nMREQ
LOW after it has synchronized back to system speed. This transition is used by the
memory controller to arbitrate whether ARM7TDM can have the bus in the next cycle.
If the bus is not available, ARM7TDM can have its clock stalled indefinitely.
Therefore, the only way to tell that the memory access has completed, is to examine the
state of both
nMREQ
and
DBGACK
. When both are HIGH, the access has completed.
The debugger normally uses EmbeddedICE Logic to control debugging, and by reading
the EmbeddedICE Logic status register, the state of
nMREQ
and
DBGACK
can be
determined. Refer to Chapter 8
EmbeddedICE Logic
for more details.
Using system speed load multiples and debug speed store multiples, the system memory
state can be fed back to the debug host.
Restrictions
There are restrictions on which instructions can have the 33rd bit set. The only valid
instructions where this bit can be set are:
loads
stores
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AS-568 | SEMI-PRECISION POWER WIREWOUND RESISTOR |
| AS568 | SEMI-PRECISION POWER WIREWOUND RESISTOR |
| AS-1 | SEMI-PRECISION POWER WIREWOUND RESISTOR |
| AS-5 | SEMI-PRECISION POWER WIREWOUND RESISTOR |
| AS-7 | SEMI-PRECISION POWER WIREWOUND RESISTOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ARM7DIMM-LPC2478 | 功能描述:模塊化系統(tǒng) - SOM LPC2478 ARM7 DIMM Module, Rev 2.2 RoHS:否 制造商:Digi International 外觀尺寸:ConnectCore 9P 處理器類型:ARM926EJ-S 頻率:150 MHz 存儲(chǔ)容量:8 MB, 16 MB 存儲(chǔ)類型:NOR Flash, SDRAM 接口類型:I2C, SPI, UART 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 尺寸:1.97 in x 1.97 in x 6.1 in |
| ARM7TDI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:周立功的中文ARM7TDI文檔 |
| ARM7TDMI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:general purpose 32-bit microprocessors |
| ARM7TDMI_G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Technical Reference Manual |
| ARM7TDMI-S | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:周立功的中文ARM7TDI文檔 |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。