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參數(shù)資料
| 型號： | AN5367FB |
| 廠商： | PANASONIC CORP |
| 元件分類： | 消費家電 |
| 英文描述： | NTSC video, chroma, and deflection signal processing circuit |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 12 X 12 MM, PLASTIC, QFP-48 |
| 文件頁數(shù)： | 13/22頁 |
| 文件大?。?/td> | 249K |
| 代理商： | AN5367FB |
13
ICs for TV
AN5367FB
Pin No.
Equivalent circuit
Description
Voltage
1
Video signal input pin 1:
Video signal input pin
Typical input 1.0 V[p-p]
Input through capacitor, and sync. top
is clamped at 2.2 V
Input video signal with low imped-
ance
AC
2
Vertical signal clamp pin:
Peak clamp pin for separating vertical
sync. signal
AC
f
=
f
V
3
Video signal output pin:
Outputs signals inputted from pin 1,
pin 46 and pin 48
Control of output signal is carried out
by I
2
C bus
Recommended range of use is from
2 mA to
+
2 mA
AC
4
DAC output pin 1:
Output voltage is adjustable in 128
stages (7-bit organization) by sub-
address of I
2
C bus (0D).
Recommended range of use is from
70
μ
A to
+
70
μ
A
DC
0.95 V
to
8.75 V
5
6
Pin 5: Vertical sync. separation input pin:
Pin 6: Horizontal sync. separation input pin:
R
V
>
R
H
so that slice level is made
deep for vertical sync. and shallow for
horizontal sync.
Cutoff frequency determined by R
H
and CH shall be about 500 kHz.
R
→
large, slice level becomes
deeper. (Weak in sync. compression)
R
→
small, slice level is shallow.
(Weak in fluctuation such as V sag)
AC
I
Terminal Equivalent Circuits
38
1
1.25 k
200
200
10
μ
A
25
μ
A
10
μ
F
V
CC1
9 V
2.75 V
3 k
10 k
10 k
50 k
200
2.2
μ
A
211
47
2
V
CC2
5 V
To ver.
count down
220
30 k
50
200
200
38
3
100
μ
A
100
μ
A
400
4
0
μ
A to
200
μ
A
1 k
200
1 k
38
100
μ
A
40 k
4 k
12 V
1.0 V[p-p]
2.2 V
2.0 V[p-p]
3.0 V
16 k
1.3 V
To H sync. sep.
To V sync. sep.
16 k
680 pF
400
1.75
k
47
16 k
400
20
μ
A
1200 pF
CH
1.75
k
20
μ
A
5
1
μ
F
560
6
0.1
μ
F
RH
RV
CV
270
2 V[p-p]
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AN5368FB | 制造商:Panasonic Industrial Company 功能描述:IC |
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