
On-Chip Routines Source Code
On-Chip FLASH Programming Routines, Rev. 4
Freescale Semiconductor
31
clr RamPntrLo ;start with 1st loc. in DATA array
;* Current stack frame
;* SP+2 [C] total bytes left to program; count down to zero
;* SP+3 [B] LADDR(lo) used to restore last addr before RTS
;* SP+4 [A] LADDR(hi)
;*********************************************************************
;* COP is serviced before each block of LoopCOP bytes are programmed
;* LoopPROG is the top of the outer loop. BSR PRGstep1 programs up to
;* LoopCOP bytes before return (last batch may be fewer than LoopCOP)
LoopPROG: lda 1,sp ;[C] total bytes remaining to prog
beq ProgEnd ;if zero, programing is done
cmp #LoopCOP ;bytes remaining >= LoopCOP
bge InitPROG ;if so, skip to InitPROG
sta ByteCntr ;< so make ByteCntr = BytesRemaining
clr 1,sp ;and clear BytesRemaining at [C]
bra Program ;Go program last partial block
InitPROG: sub #LoopCOP ;>= so subtract LoopCOP
sta 1,sp ;bytes remaining reduced by LoopCOP
lda #LoopCOP ;prepare to prog LoopCOP bytes
sta ByteCntr ;ByteCntr = LoopCOP
Program: bsr PRGstep1 ;program up to LoopCOP bytes
bra LoopPROG ;repeat outer loop...check number of
;bytes remaining
ProgEnd:
pula ;deallocate [C]
pula
sta LADDR+1 ;restore an original value to LADDR+1
pula
sta LADDR ;restore an original value to LADDR
rts
;*********************************************************************
;* FLASH Programming Algorithm
;*********************************************************************
PRGstep1: sta COPCTL ;[4] service COP
;before programming ByteCntr bytes
lda #mPGM ;[2]
sta FLCR ;[..w.] set PGM (Prog Algo Step 1)
PRGstep2: lda FLBPR ;[4] read FLBPR (Prog Algo Step 2)
PRGstep3: sta ,x ;[2] write to Flash address [H:X]
; w/ any data (Prog Algo Step 3)
PRGstep4: lda CPUSPD ;[3] delay for time Tnvs
dbnza * ;[3*CPUSPD] (Prog Algo Step 4)
PRGstep5: lda #(mPGM+mHVEN) ;sets HVEN and leaves PGM set
sta FLCR ;[..w.] set HVEN (Prog Algo Step 5)
PRGstep6: lda CPUSPD ;[3] delay for time Tpgs
dbnza * ;[3*CPUSPD] (Prog Algo Step 6)