參數(shù)資料
型號(hào)： AM79C972BVIW
廠商： ADVANCED MICRO DEVICES INC
元件分類： 微控制器/微處理器
英文描述： PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support
中文描述： 5 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176
封裝： TQFP-176
文件頁(yè)數(shù)： 104/130頁(yè)
文件大?。?/td> 1580K
代理商： AM79C972BVIW
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104
Am79C972
10
D2_SPT
D2 Support. If this bit is a 1, this
function supports the D2 Power
Management State.
Read only.
9
D1_SPT
D1 Support. If this bit is a 1, this
function supports the D1 Power
Management State.
Read only.
8-6
RES
Reserved locations. Written as
zeros and read as undefined.
5
DSI
Device
When this bit is 1, it indicates that
special initialization of the func-
tion is required (beyond the stan-
dard PCI configuration header)
before the generic class device
driver is able to use it.
Specific
Initialization.
Read only.
4
AUXPS
Auxiliary Power Source. This bit
is only meaningful if bit 15
(D3cold supporting PME) is a 1.
When this bit is also a 1, it indi-
cates that support for PME in
D3cold requires auxiliary power
supplied by the system by way of
a proprietary delivery vehicle.
A 0 in this bit indicates that the
function supplies its own auxiliary
power source.
If the function does not support
PME while in D3cold, (bit15=0)
then this field must always return
0.
Read only.
3
PME_CLK
PME Clock. When this bit is a 1,
it indicates that the function relies
on the presence of the PCI clock
for PME operation. When this bit
is a 0 it indicates that no PCI
clock is required for the function
to generate PME.
Functions that do not support
PME generation in any state
must return 0 for this field.
Read only.
2-0
PMIS_VER Power Management Interface
Specification Version. A value of
001b indicates that this function
complies with the revision 1.0 of
the PCI Power Management In-
terface Specification.
PCI Power Management Control/Status Register
(PMCSR)
Offset 44h
Bit
Name
Description
15
PME_STATUS PME Status. This bit is set when
the function would normally as-
sert the PME signal independent
of the state of the PME_EN bit.
Writing a 1 to this bit will clear it
and cause the function to stop as-
serting a PME (if enabled). Writ-
ing a 0 has no effect.
If the function supports PME from
D3cold then this bit is sticky and
must be explicitly cleared by the
operating system each time the
operating system is initially load-
ed.
Read/write accessible always.
Sticky bit. This bit is reset by
POR. H_RESET, S_RESET, or
setting the STOP bit has no ef-
fect.
14-13 DATA_SCALE
Data Scale. This two bit read-
only field indicates the scaling
factor to be used when interpret-
ing the value of the Data register.
The value and meaning of this
field will vary depending on the
DATA_SCALE field.
Read only.
12-9
DATA_SEL Data Select. This optional four-bit
field is used to select which data
is reported through the Data reg-
ister and DATA_SCALE field.
Read/write accessible always.
Sticky bit. This bit is reset by
POR. H_RESET, S_RESET, or
setting the STOP bit has no ef-
fect.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AM79C973 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
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AM79C973/AM79C975 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Am79C973/Am79C975 - PCnet-FAST III Single-Chip 10/100 Mbps PCI Ethernet Controller with Integrated PHY
AM79C973AVC\\W 制造商:Advanced Micro Devices 功能描述:
AM79C973AVC\W 制造商:Advanced Micro Devices 功能描述:
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