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參數(shù)資料
| 型號： | AM79C971VCW |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| 中文描述： | 4 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP176 |
| 封裝： | TQFP-176 |
| 文件頁數(shù)： | 64/265頁 |
| 文件大?。?/td> | 3190K |
| 代理商： | AM79C971VCW |
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64
Am79C971
The disable FCS generation/transmission feature can
be programmed as a static feature or dynamically on a
frame-by-frame basis.
Transmit FIFO Watermark (XMTFW) in CSR80 sets the
point at which the BMU requests more data from the
transmit buffers for the FIFO. A minimum of XMTFW
empty spaces must be available in the transmit FIFO
before the BMU will request the system bus in order to
transfer transmit frame data into the transmit FIFO.
Transmit Start Point (XMTSP) in CSR80 sets the point
when the transmitter actually attempts to transmit a
must be written to the transmit FIFO for the current
frame before transmission of the current frame will be-
gin. (When automatically padded packets are being
sent, it is conceivable that the XMTSP is not reached
when all of the data has been transferred to the FIFO.
In this case, the transmission will begin when all of the
frame data has been placed into the transmit FIFO.)
The default value of XMTSP is 01b, meaning there has
to be 64 bytes in the transmit FIFO to start a transmis-
sion.
Automatic Pad Generation
Transmit frames can be automatically padded to extend
them to 64 data bytes (excluding preamble). This al-
lows the minimum frame size of 64 bytes (512 bits) for
IEEE 802.3/Ethernet to be guaranteed with no software
intervention from the host/controlling process. Setting
the APAD_XMT bit in CSR4 enables the automatic
padding feature. The pad is placed between the LLC
data field and FCS field in the IEEE 802.3 frame. FCS
is always added if the frame is padded, regardless of
the state of DXMTFCS (CSR15, bit 3) or ADD_FCS/
NO_FCS (TMD1, bit 29). The transmit frame will be
padded by bytes with the value of 00H. The default
value of APAD_XMT is 0, which will disable automatic
pad generation after H_RESET.
It is the responsibility of upper layer software to cor-
rectly define the actual length field contained in the
message to correspond to the total number of LLC
Data bytes encapsulated in the frame (length field as
defined in the ISO 8802-3 (IEEE/ANSI 802.3) stan-
dard). The length value contained in the message is not
used by the Am79C971 controller to compute the ac-
tual number of pad bytes to be inserted. The
Am79C971 controller will append pad bytes dependent
on the actual number of bits transmitted onto the net-
work. Once the last data byte of the frame has com-
pleted, prior to appending the FCS, the Am79C971
controller will check to ensure that 544 bits have been
transmitted. If not, pad bytes are added to extend the
frame size to this value, and the FCS is then added.
See Figure 33.
.
Figure 33.
ISO 8802-3 (IEEE/ANSI 802.3) Data Frame
The 544 bit count is derived from the following:
Minimum frame size (excluding preamble/SFD,
including FCS)
64 bytes
512 bits
Preamble/SFD size 8 bytes
64 bits
FCS size
4 bytes
32 bits
At the point that FCS is to be appended, the transmitted
frame should contain:
Preamble/SFD + (Min Frame Size - FCS)
64 + (512-32) = 544 bits
A minimum length transmit frame from the Am79C971
controller, therefore, will be 576 bits, after the FCS is
appended.
Transmit FCS Generation
Automatic generation and transmission of FCS for a
transmit frame depends on the value of DXMTFCS
(CSR15, bit 3). If DXMTFCS is cleared to 0, the trans-
mitter will generate and append the FCS to the trans-
mitted frame. If the automatic padding feature is
invoked (APAD_XMT is set in CSR4), the FCS will be
appended to frames shorter than 64 bytes by the
Am79C971 controller regardless of the state of DXMT-
FCS or ADD_FCS/NO_FCS (TMD1, bit 29). Note that
the calculated FCS is transmitted most significant bit
.
Preamble
1010....1010
SFD
10101011
Destination
Address
Source
Address
Length
LLC
Data
Pad
FCS
4
Bytes
46
–
1500
Bytes
2
Bytes
6
Bytes
6
Bytes
8
Bits
56
Bits
20550D-36
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| AM79C971 | PCnet⑩-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus |
| AM79C971KCW | IC LOGIC 16211 24-BIT FET BUS SWITCH -40+85C TSSOP-56 35/TUBE |
| AM79C972BKCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKIW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BVCW | PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79C972 | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKC\\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKC\W | 制造商:Advanced Micro Devices 功能描述: |
| AM79C972BKCW | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:PCnet⑩-FAST+ Enhanced 10/100 Mbps PCI Ethernet Controller with OnNow Support |
| AM79C972BKD/W | 制造商:Advanced Micro Devices 功能描述: |
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